[rtems-docs commit] aarch64: Update interrupt details

[Joel Sherrill]

Module:    rtems-docs
Branch:    master
Commit:    9c407619c72bd97b19d96092d20dc48ce9bb0256
Changeset: http://git.rtems.org/rtems-docs/commit/?id=9c407619c72bd97b19d96092d20dc48ce9bb0256

Author:    Kinsey Moore <kinsey.moore at oarcorp.com>
Date:      Mon Dec  7 12:10:26 2020 -0600

aarch64: Update interrupt details

---

 cpu-supplement/aarch64.rst | 5 ++++-
 user/bsps/aarch64/a53.rst  | 5 +++--
 2 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/cpu-supplement/aarch64.rst b/cpu-supplement/aarch64.rst
index 9e74d6b..a102817 100644
--- a/cpu-supplement/aarch64.rst
+++ b/cpu-supplement/aarch64.rst
@@ -104,7 +104,10 @@ Interrupt Stack
 ---------------
 
 The board support package must initialize the interrupt stack. The memory for
-the stacks is usually reserved in the linker script.
+the stacks is usually reserved in the linker script. The interrupt stack pointer
+is stored in the EL0 stack pointer and is accessed by switching to SP0 mode
+at the beginning of interrupt calls and back to SPx mode after completion of
+interrupt calls using the `spsel` instruction.
 
 Default Fatal Error Processing
 ==============================
diff --git a/user/bsps/aarch64/a53.rst b/user/bsps/aarch64/a53.rst
index 9f085b8..73735b1 100644
--- a/user/bsps/aarch64/a53.rst
+++ b/user/bsps/aarch64/a53.rst
@@ -8,8 +8,9 @@
 Qemu A53
 ========
 
-This BSP supports two variants, `qemu_a53_ilp32` and `qemu-a53_lp64`. The basic
-hardware initialization is performed by the BSP.
+This BSP supports two variants, `qemu_a53_ilp32` and `qemu_a53_lp64`. The basic
+hardware initialization is performed by the BSP. These BSPs support the GICv3
+interrupt controller.
 
 Boot via ELF
 ------------