[rtems-libbsd commit] dwc_otg: Add support for nexus bus
Sebastian Huber
sebh at rtems.org
Tue Oct 27 05:33:38 UTC 2020
Module: rtems-libbsd
Branch: master
Commit: 6c83023331073cacc598f5ade315e4f6542d23aa
Changeset: http://git.rtems.org/rtems-libbsd/commit/?id=6c83023331073cacc598f5ade315e4f6542d23aa
Author: Sebastian Huber <sebastian.huber at embedded-brains.de>
Date: Tue Mar 31 10:20:04 2020 +0200
dwc_otg: Add support for nexus bus
Update #3910.
---
freebsd/sys/dev/usb/controller/dwc_otg.h | 3 +
libbsd.py | 2 +
rtemsbsd/include/bsp/nexus-devices.h | 18 +++
rtemsbsd/sys/dev/usb/controller/dwc_otg_nexus.c | 166 ++++++++++++++++++++++
rtemsbsd/sys/dev/usb/controller/dwc_otg_stm32h7.c | 87 ++++++++++++
5 files changed, 276 insertions(+)
diff --git a/freebsd/sys/dev/usb/controller/dwc_otg.h b/freebsd/sys/dev/usb/controller/dwc_otg.h
index 2de0214..fd8ce96 100644
--- a/freebsd/sys/dev/usb/controller/dwc_otg.h
+++ b/freebsd/sys/dev/usb/controller/dwc_otg.h
@@ -223,5 +223,8 @@ driver_filter_t dwc_otg_filter_interrupt;
driver_intr_t dwc_otg_interrupt;
int dwc_otg_init(struct dwc_otg_softc *);
void dwc_otg_uninit(struct dwc_otg_softc *);
+#ifdef __rtems__
+void dwc_otg_platform_init(struct dwc_otg_softc *);
+#endif /* __rtems__ */
#endif /* _DWC_OTG_H_ */
diff --git a/libbsd.py b/libbsd.py
index 1105328..27a1e4a 100644
--- a/libbsd.py
+++ b/libbsd.py
@@ -230,6 +230,8 @@ class rtems(builder.Module):
'sys/dev/stmac/if_stmac.c',
'sys/dev/tsec/if_tsec_nexus.c',
'sys/dev/usb/controller/ehci_mpc83xx.c',
+ 'sys/dev/usb/controller/dwc_otg_nexus.c',
+ 'sys/dev/usb/controller/dwc_otg_stm32h7.c',
'sys/dev/usb/controller/ohci_lpc32xx.c',
'sys/dev/usb/controller/ohci_lpc.c',
'sys/dev/usb/controller/usb_otg_transceiver.c',
diff --git a/rtemsbsd/include/bsp/nexus-devices.h b/rtemsbsd/include/bsp/nexus-devices.h
index 9e4037e..095dfea 100644
--- a/rtemsbsd/include/bsp/nexus-devices.h
+++ b/rtemsbsd/include/bsp/nexus-devices.h
@@ -161,9 +161,27 @@ RTEMS_BSD_DRIVER_USB_MASS;
#elif defined(LIBBSP_ARM_STM32H7_BSP_H)
+#include <stm32h7xx.h>
+
RTEMS_BSD_DEFINE_NEXUS_DEVICE(stmac, 0, 0, NULL);
SYSINIT_DRIVER_REFERENCE(ukphy, miibus);
+static const rtems_bsd_device_resource dwcotg_res[] = {
+ {
+ .type = RTEMS_BSD_RES_MEMORY,
+ .start_request = 0,
+ .start_actual = USB2_OTG_FS_PERIPH_BASE
+ }, {
+ .type = RTEMS_BSD_RES_IRQ,
+ .start_request = 0,
+ .start_actual = OTG_FS_IRQn
+ }
+};
+RTEMS_BSD_DEFINE_NEXUS_DEVICE(dwcotg, 0, RTEMS_ARRAY_SIZE(dwcotg_res),
+ dwcotg_res);
+RTEMS_BSD_DRIVER_USB;
+RTEMS_BSD_DRIVER_USB_MASS;
+
#elif defined(LIBBSP_I386_PC386_BSP_H)
RTEMS_BSD_DRIVER_PC_LEGACY;
diff --git a/rtemsbsd/sys/dev/usb/controller/dwc_otg_nexus.c b/rtemsbsd/sys/dev/usb/controller/dwc_otg_nexus.c
new file mode 100644
index 0000000..243470c
--- /dev/null
+++ b/rtemsbsd/sys/dev/usb/controller/dwc_otg_nexus.c
@@ -0,0 +1,166 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
+ *
+ * Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+ * Copyright (c) 2012 Hans Petter Selasky. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <machine/rtems-bsd-kernel-space.h>
+
+#include <sys/cdefs.h>
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/bus.h>
+#include <sys/condvar.h>
+#include <sys/kernel.h>
+#include <sys/lock.h>
+#include <sys/malloc.h>
+#include <sys/module.h>
+#include <sys/mutex.h>
+#include <sys/rman.h>
+
+#include <dev/usb/usb.h>
+#include <dev/usb/usbdi.h>
+
+#include <dev/usb/usb_core.h>
+#include <dev/usb/usb_busdma.h>
+#include <dev/usb/usb_process.h>
+#include <dev/usb/usb_util.h>
+
+#include <dev/usb/usb_controller.h>
+#include <dev/usb/usb_bus.h>
+
+#include <dev/usb/controller/dwc_otg.h>
+
+static int dwc_otg_detach(device_t);
+
+static int
+dwc_otg_probe(device_t dev)
+{
+
+ device_set_desc(dev, "DWC OTG 2.0 integrated USB controller");
+ return (BUS_PROBE_DEFAULT);
+}
+
+static int
+dwc_otg_attach(device_t dev)
+{
+ struct dwc_otg_softc *sc;
+ int err;
+ int rid;
+
+ sc = device_get_softc(dev);
+
+ /* initialise some bus fields */
+ sc->sc_bus.parent = dev;
+ sc->sc_bus.devices = sc->sc_devices;
+ sc->sc_bus.devices_max = DWC_OTG_MAX_DEVICES;
+ sc->sc_bus.dma_bits = 32;
+ sc->sc_mode = DWC_MODE_HOST;
+ sc->sc_phy_type = DWC_OTG_PHY_INTERNAL;
+
+ /* get all DMA memory */
+ if (usb_bus_mem_alloc_all(&sc->sc_bus,
+ USB_GET_DMA_TAG(dev), NULL)) {
+ return (ENOMEM);
+ }
+
+ rid = 0;
+ sc->sc_io_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
+ &rid, RF_ACTIVE);
+ if (sc->sc_io_res == NULL) {
+ goto error;
+ }
+ sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
+ sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
+ sc->sc_io_size = rman_get_size(sc->sc_io_res);
+
+ rid = 0;
+ sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
+ RF_ACTIVE);
+ if (sc->sc_irq_res == NULL) {
+ goto error;
+ }
+
+ sc->sc_bus.bdev = device_add_child(dev, "usbus", -1);
+ if (sc->sc_bus.bdev == NULL) {
+ goto error;
+ }
+
+ device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
+ dwc_otg_platform_init(sc);
+
+ err = bus_setup_intr(dev, sc->sc_irq_res, INTR_TYPE_TTY | INTR_MPSAFE,
+ &dwc_otg_filter_interrupt, &dwc_otg_interrupt, sc, &sc->sc_intr_hdl);
+ if (err) {
+ sc->sc_intr_hdl = NULL;
+ goto error;
+ }
+ err = dwc_otg_init(sc);
+ if (err == 0) {
+ err = device_probe_and_attach(sc->sc_bus.bdev);
+ }
+ if (err) {
+ goto error;
+ }
+
+
+ return (0);
+
+error:
+ dwc_otg_detach(dev);
+ return (ENXIO);
+}
+
+static int
+dwc_otg_detach(device_t dev)
+{
+
+ (void)dev;
+ BSD_ASSERT(0);
+ return (0);
+}
+
+static device_method_t dwc_otg_methods[] = {
+ /* Device interface */
+ DEVMETHOD(device_probe, dwc_otg_probe),
+ DEVMETHOD(device_attach, dwc_otg_attach),
+ DEVMETHOD(device_detach, dwc_otg_detach),
+ DEVMETHOD(device_suspend, bus_generic_suspend),
+ DEVMETHOD(device_resume, bus_generic_resume),
+ DEVMETHOD(device_shutdown, bus_generic_shutdown),
+
+ DEVMETHOD_END
+};
+
+driver_t dwc_otg_driver = {
+ .name = "dwcotg",
+ .methods = dwc_otg_methods,
+ .size = sizeof(struct dwc_otg_softc),
+};
+
+static devclass_t dwc_otg_devclass;
+
+DRIVER_MODULE(dwcotg, nexus, dwc_otg_driver, dwc_otg_devclass, 0, 0);
+MODULE_DEPEND(dwcotg, usb, 1, 1, 1);
diff --git a/rtemsbsd/sys/dev/usb/controller/dwc_otg_stm32h7.c b/rtemsbsd/sys/dev/usb/controller/dwc_otg_stm32h7.c
new file mode 100644
index 0000000..4303798
--- /dev/null
+++ b/rtemsbsd/sys/dev/usb/controller/dwc_otg_stm32h7.c
@@ -0,0 +1,87 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/*
+ * Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <machine/rtems-bsd-kernel-space.h>
+
+#include <bsp.h>
+
+#ifdef LIBBSP_ARM_STM32H7_BSP_H
+
+#include <sys/cdefs.h>
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/bus.h>
+#include <sys/condvar.h>
+
+#include <dev/usb/usb.h>
+#include <dev/usb/usbdi.h>
+
+#include <dev/usb/usb_core.h>
+#include <dev/usb/usb_busdma.h>
+#include <dev/usb/usb_process.h>
+#include <dev/usb/usb_util.h>
+
+#include <dev/usb/usb_controller.h>
+#include <dev/usb/usb_bus.h>
+
+#include <dev/usb/controller/dwc_otg.h>
+
+#include <stm32h7/hal.h>
+
+static const stm32h7_gpio_config dwc_otg_pins_dm_dp = {
+ .regs = GPIOA,
+ .config = {
+ .Pin = GPIO_PIN_11 | GPIO_PIN_12,
+ .Mode = GPIO_MODE_AF_PP,
+ .Pull = GPIO_NOPULL,
+ .Speed = GPIO_SPEED_FREQ_VERY_HIGH,
+ .Alternate = GPIO_AF10_OTG2_FS
+ }
+};
+
+static const stm32h7_gpio_config dwc_otg_pin_id = {
+ .regs = GPIOA,
+ .config = {
+ .Pin = GPIO_PIN_10,
+ .Mode = GPIO_MODE_AF_OD,
+ .Pull = GPIO_PULLUP,
+ .Alternate = GPIO_AF10_OTG2_FS
+ }
+};
+
+void
+dwc_otg_platform_init(struct dwc_otg_softc *sc)
+{
+
+ (void)sc;
+ stm32h7_gpio_init(&dwc_otg_pins_dm_dp);
+ stm32h7_gpio_init(&dwc_otg_pin_id);
+ stm32h7_clk_enable(STM32H7_MODULE_USB2_OTG);
+ stm32h7_clk_low_power_disable(STM32H7_MODULE_USB2_OTG_ULPI);
+}
+
+#endif /* LIBBSP_ARM_STM32H7_BSP_H */
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