[rtems-source-builder commit] Add sis to RISC-V build
Jiri Gaisler
jiri at rtems.org
Thu Sep 10 06:57:55 UTC 2020
Module: rtems-source-builder
Branch: master
Commit: a81a237f3e2318d88a16b31aadb82333498e06fd
Changeset: http://git.rtems.org/rtems-source-builder/commit/?id=a81a237f3e2318d88a16b31aadb82333498e06fd
Author: Jiri Gaisler <jiri at gaisler.se>
Date: Thu Sep 10 08:56:32 2020 +0200
Add sis to RISC-V build
---
rtems/config/6/rtems-riscv.bset | 1 +
1 file changed, 1 insertion(+)
diff --git a/rtems/config/6/rtems-riscv.bset b/rtems/config/6/rtems-riscv.bset
index 42a4ebd..ad7cb5b 100644
--- a/rtems/config/6/rtems-riscv.bset
+++ b/rtems/config/6/rtems-riscv.bset
@@ -2,3 +2,4 @@
%define rtems_arch riscv
%define with_libgomp
%include 6/rtems-default.bset
+devel/sis-2-1
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