[rtems commit] bsps/aarch64: Remove erroneous cache feature

[Joel Sherrill]

Module:    rtems
Branch:    master
Commit:    68b0db358c81a7f770a44ceb819197bdc320bc99
Changeset: http://git.rtems.org/rtems/commit/?id=68b0db358c81a7f770a44ceb819197bdc320bc99

Author:    Kinsey Moore <kinsey.moore at oarcorp.com>
Date:      Fri Dec 10 09:45:54 2021 -0600

bsps/aarch64: Remove erroneous cache feature

The AArch64 cache implementation does not define
rtems_cache_disable_data(), but declares that it does via
CPU_CACHE_SUPPORT_PROVIDES_DISABLE_DATA. The existing implementation of
_CPU_cache_disable_data() is sufficient to enable this functionality
without the erroneous cache feature flag.

Closes #4569

---

 bsps/aarch64/shared/cache/cache.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/bsps/aarch64/shared/cache/cache.c b/bsps/aarch64/shared/cache/cache.c
index 9e7446a..fc1766c 100644
--- a/bsps/aarch64/shared/cache/cache.c
+++ b/bsps/aarch64/shared/cache/cache.c
@@ -47,8 +47,6 @@
 
 #define CPU_CACHE_SUPPORT_PROVIDES_CACHE_SIZE_FUNCTIONS
 
-#define CPU_CACHE_SUPPORT_PROVIDES_DISABLE_DATA
-
 #define AARCH64_CACHE_L1_CPU_DATA_ALIGNMENT ( (size_t) 64 )
 #define AARCH64_CACHE_PREPARE_MVA(mva) (const void *) \
   RTEMS_ALIGN_DOWN ( (size_t) mva, AARCH64_CACHE_L1_CPU_DATA_ALIGNMENT )