[rtems-docs commit] user/bsps: Update ZynqMP for hardware BSPs

Joel Sherrill joel at rtems.org
Thu Jul 1 20:46:42 UTC 2021

Module:    rtems-docs
Branch:    master
Commit:    b528508dad47a34bfe76ca156ed139e867975db7
Changeset: http://git.rtems.org/rtems-docs/commit/?id=b528508dad47a34bfe76ca156ed139e867975db7

Author:    Kinsey Moore <kinsey.moore at oarcorp.com>
Date:      Thu Jul  1 13:25:44 2021 -0500

user/bsps: Update ZynqMP for hardware BSPs

Update the ZynqMP documentation for the new hardware BSP variants
including information about booting, boot image generation, and


 user/bsps/aarch64/xilinx-zynqmp.rst | 57 +++++++++++++++++++++++++++++++------
 1 file changed, 49 insertions(+), 8 deletions(-)

diff --git a/user/bsps/aarch64/xilinx-zynqmp.rst b/user/bsps/aarch64/xilinx-zynqmp.rst
index 7401e84..71b6842 100644
--- a/user/bsps/aarch64/xilinx-zynqmp.rst
+++ b/user/bsps/aarch64/xilinx-zynqmp.rst
@@ -4,19 +4,46 @@
 .. _BSP_aarch64_qemu_xilinx_zynqmp_ilp32_qemu:
 .. _BSP_aarch64_qemu_xilinx_zynqmp_lp64_qemu:
+.. _BSP_aarch64_qemu_xilinx_zynqmp_ilp32_zu3eg:
+.. _BSP_aarch64_qemu_xilinx_zynqmp_lp64_zu3eg:
 Qemu Xilinx ZynqMP
-This BSP supports two variants, `xilinx-zynqmp-ilp32-qemu` and
-`xilinx-zynqmp-lp64-qemu`. The basic hardware initialization is performed by the
-BSP. These BSPs support the GICv2 interrupt controller present in all ZynqMP
+This BSP supports four variants: `xilinx-zynqmp-ilp32-qemu`,
+`xilinx-zynqmp-lp64-qemu`, `xilinx-zynqmp-ilp32-zu3eg`, and
+`xilinx-zynqmp-lp64-zu3eg`. Platform-specific hardware initialization is
+performed by ARM Trusted Firmware (ATF). Other basic hardware initialization is
+performed by the BSP. These BSPs support the GICv2 interrupt controller present
+in all ZynqMP systems. The zu3eg BSPs have also been tested to be fully
+functional on zu2cg boards and should also work on any other ZynqMP chip variant
+since the Processing Subsystem (PS) does not vary among chip variants other than
+the number of CPU cores available.
-Boot via ELF
+Boot on QEMU
 The executable image is booted by Qemu in ELF format.
+Boot on ZynqMP Hardware
+On ZynqMP hardware, RTEMS can be started at EL1, EL2, or EL3 by u-boot or
+directly as part of BOOT.bin. Regardless of the exception level at boot, RTEMS
+will drop to EL1 for execution. For quick turnaround during testing, it is
+recommended to use the u-boot BOOT.bin that comes with the PetaLinux prebuilts
+for the board in question.
+Hardware Boot Image Generation
+RTEMS expects some hardware initialization to be performed by ATF and expects
+the services it provides to be present, so this must be included when generating
+a direct-boot RTEMS BOOT.bin.
+When booting via u-boot, RTEMS must be packaged into a u-boot image or booted
+as a raw binary since u-boot does not currently support ELF64 which is required
+for AArch64 ELF binaries.
 Clock Driver
@@ -25,10 +52,24 @@ The clock driver uses the `ARM Generic Timer`.
 Console Driver
-The console driver supports the default Qemu emulated ARM PL011 PrimeCell UART.
+The console driver supports the default Qemu emulated ARM PL011 PrimeCell UART
+as well as the physical ARM PL011 PrimeCell UART in the ZynqMP hardware.
+Network Configuration
+When used with LibBSD, these BSP variants support networking via the four
+Cadence GEM instances present on all ZynqMP hardware variants. These are enabled
+using config.inc in LibBSD by setting any of the following constants to 1:
+Most ZynqMP dev boards use CGEM3. None of the interfaces are enabled by default.
-Running Executables
+Running Executables on QEMU
 Executables generated by these BSPs can be run using the following command::

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