[rtems-central commit] spec: Move _CPU_Fatal_halt() item
Sebastian Huber
sebh at rtems.org
Wed Sep 15 13:42:37 UTC 2021
Module: rtems-central
Branch: master
Commit: 00ee27d6a54b1e1f8529dc49e4cff3ec99e1bbbd
Changeset: http://git.rtems.org/rtems-central/commit/?id=00ee27d6a54b1e1f8529dc49e4cff3ec99e1bbbd
Author: Sebastian Huber <sebastian.huber at embedded-brains.de>
Date: Wed Sep 15 12:46:22 2021 +0200
spec: Move _CPU_Fatal_halt() item
Add a validation by inspection.
---
.../cpu/req/fatal-halt-sparc.yml} | 10 +++++-----
spec/score/cpu/val/fatal-halt-sparc.yml | 22 ++++++++++++++++++++++
2 files changed, 27 insertions(+), 5 deletions(-)
diff --git a/spec/bsp/sparc/leon3/req/fatal-halt.yml b/spec/score/cpu/req/fatal-halt-sparc.yml
similarity index 52%
rename from spec/bsp/sparc/leon3/req/fatal-halt.yml
rename to spec/score/cpu/req/fatal-halt-sparc.yml
index c5e755e..318b983 100644
--- a/spec/bsp/sparc/leon3/req/fatal-halt.yml
+++ b/spec/score/cpu/req/fatal-halt-sparc.yml
@@ -1,16 +1,16 @@
SPDX-License-Identifier: CC-BY-SA-4.0
copyrights:
- Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de)
-enabled-by: bsps/sparc/leon3
+enabled-by: sparc
links:
- role: requirement-refinement
- uid: /score/cpu/req/fatal-halt
+ uid: fatal-halt
functional-type: function
rationale: null
references: []
requirement-type: functional
text: |
- The ${/score/cpu/if/fatal-halt:/name} directive shall cause a system error
- halt with the primary exit code set to the fatal source and the secondary
- exit code set to the fatal code.
+ The ${../if/fatal-halt:/name} directive shall cause a system error halt with
+ the primary exit code set to the fatal source and the secondary exit code set
+ to the fatal code.
type: requirement
diff --git a/spec/score/cpu/val/fatal-halt-sparc.yml b/spec/score/cpu/val/fatal-halt-sparc.yml
new file mode 100644
index 0000000..0055347
--- /dev/null
+++ b/spec/score/cpu/val/fatal-halt-sparc.yml
@@ -0,0 +1,22 @@
+SPDX-License-Identifier: CC-BY-SA-4.0
+copyrights:
+- Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de)
+enabled-by: sparc
+links:
+- role: validation
+ uid: ../req/fatal-halt-sparc
+method: by-inspection
+references:
+- identifier: cpukit/score/cpu/sparc/include/rtems/asm.h
+ hash: biIdJwey_Juwf8LH4_ftg7zV2PuUqXH3lIirQxTyW5E=
+ type: file
+- identifier: cpukit/score/cpu/sparc/syscall.S
+ hash: QDjhpRe0UrN3OhoVJEGSnJU0028ZHBGjXYFXrZsRwO4=
+ type: file
+text: |
+ Inspection of the referenced ${/glossary/sourcecode:/term} files showed that
+ the ${../if/fatal-halt:/name} directive is implemented as specified. In
+ addition, the instruction sequence of the directive was executed in assembler
+ single step mode under control of a debugger on the SPARC/RISCV instruction
+ simulator version 2.29 to validate that its function is as specified.
+type: validation
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