[rtems commit] bsps: Move gicv3_init_dist()
Sebastian Huber
sebh at rtems.org
Wed Apr 6 13:49:06 UTC 2022
Module: rtems
Branch: master
Commit: b3519336fd5a04dd52556fd655fdbb827585deed
Changeset: http://git.rtems.org/rtems/commit/?id=b3519336fd5a04dd52556fd655fdbb827585deed
Author: Sebastian Huber <sebastian.huber at embedded-brains.de>
Date: Mon Mar 14 15:54:37 2022 +0100
bsps: Move gicv3_init_dist()
Make the distributor register block a parameter.
---
bsps/include/dev/irq/arm-gicv3.h | 37 +++++++++++++++++++++++++++++++++++++
bsps/shared/dev/irq/arm-gicv3.c | 40 +---------------------------------------
2 files changed, 38 insertions(+), 39 deletions(-)
diff --git a/bsps/include/dev/irq/arm-gicv3.h b/bsps/include/dev/irq/arm-gicv3.h
index 37e0d433cc..de15b5cc81 100644
--- a/bsps/include/dev/irq/arm-gicv3.h
+++ b/bsps/include/dev/irq/arm-gicv3.h
@@ -242,6 +242,43 @@ static inline void gicv3_trigger_sgi(
WRITE64_SR(ICC_SGI1, value);
}
+static inline uint32_t gicv3_get_id_count(volatile gic_dist *dist)
+{
+ uint32_t id_count = GIC_DIST_ICDICTR_IT_LINES_NUMBER_GET(dist->icdictr);
+
+ id_count = 32 * (id_count + 1);
+ id_count = id_count <= 1020 ? id_count : 1020;
+
+ return id_count;
+}
+
+static void gicv3_init_dist(volatile gic_dist *dist)
+{
+ uint32_t id_count = gicv3_get_id_count(dist);
+ uint32_t id;
+
+ dist->icddcr = GIC_DIST_ICDDCR_ARE_NS | GIC_DIST_ICDDCR_ARE_S
+ | GIC_DIST_ICDDCR_ENABLE_GRP1S | GIC_DIST_ICDDCR_ENABLE_GRP1NS
+ | GIC_DIST_ICDDCR_ENABLE_GRP0;
+
+ for (id = 0; id < id_count; id += 32) {
+ /* Disable all interrupts */
+ dist->icdicer[id / 32] = 0xffffffff;
+
+ /* Set G1NS */
+ dist->icdigr[id / 32] = 0xffffffff;
+ dist->icdigmr[id / 32] = 0;
+ }
+
+ for (id = 0; id < id_count; ++id) {
+ gic_id_set_priority(dist, id, PRIORITY_DEFAULT);
+ }
+
+ for (id = 32; id < id_count; ++id) {
+ gic_id_set_targets(dist, id, 0x01);
+ }
+}
+
#ifdef __cplusplus
}
#endif
diff --git a/bsps/shared/dev/irq/arm-gicv3.c b/bsps/shared/dev/irq/arm-gicv3.c
index 6c623f0ccb..29ef2bb1a3 100644
--- a/bsps/shared/dev/irq/arm-gicv3.c
+++ b/bsps/shared/dev/irq/arm-gicv3.c
@@ -198,44 +198,6 @@ rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector)
return RTEMS_SUCCESSFUL;
}
-static inline uint32_t get_id_count(volatile gic_dist *dist)
-{
- uint32_t id_count = GIC_DIST_ICDICTR_IT_LINES_NUMBER_GET(dist->icdictr);
-
- id_count = 32 * (id_count + 1);
- id_count = id_count <= 1020 ? id_count : 1020;
-
- return id_count;
-}
-
-static void gicv3_init_dist(void)
-{
- volatile gic_dist *dist = ARM_GIC_DIST;
- uint32_t id_count = get_id_count(dist);
- uint32_t id;
-
- dist->icddcr = GIC_DIST_ICDDCR_ARE_NS | GIC_DIST_ICDDCR_ARE_S
- | GIC_DIST_ICDDCR_ENABLE_GRP1S | GIC_DIST_ICDDCR_ENABLE_GRP1NS
- | GIC_DIST_ICDDCR_ENABLE_GRP0;
-
- for (id = 0; id < id_count; id += 32) {
- /* Disable all interrupts */
- dist->icdicer[id / 32] = 0xffffffff;
-
- /* Set G1NS */
- dist->icdigr[id / 32] = 0xffffffff;
- dist->icdigmr[id / 32] = 0;
- }
-
- for (id = 0; id < id_count; ++id) {
- gic_id_set_priority(dist, id, PRIORITY_DEFAULT);
- }
-
- for (id = 32; id < id_count; ++id) {
- gic_id_set_targets(dist, id, 0x01);
- }
-}
-
static void gicv3_init_cpu_interface(void)
{
uint32_t cpu_index = _SMP_Get_current_processor();
@@ -267,7 +229,7 @@ static void gicv3_init_cpu_interface(void)
void bsp_interrupt_facility_initialize(void)
{
arm_interrupt_facility_set_exception_handler();
- gicv3_init_dist();
+ gicv3_init_dist(ARM_GIC_DIST);
gicv3_init_cpu_interface();
}
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