[rtems commit] bsps/powerpc/gen5200: Manual Header clean up
Christian Mauderer
christianm at rtems.org
Thu Mar 10 08:06:49 UTC 2022
Module: rtems
Branch: master
Commit: 4f9db3fae69687f4f3bdbc0a67217ac0c78491ca
Changeset: http://git.rtems.org/rtems/commit/?id=4f9db3fae69687f4f3bdbc0a67217ac0c78491ca
Author: Christian Mauderer <christian.mauderer at embedded-brains.de>
Date: Fri Mar 4 09:52:59 2022 +0100
bsps/powerpc/gen5200: Manual Header clean up
Update #4625.
---
bsps/powerpc/gen5200/console/console.c | 135 ++++++++-----------------
bsps/powerpc/gen5200/include/bsp/irq.h | 120 +++++++---------------
bsps/powerpc/gen5200/include/bsp/nvram.h | 112 +++++++--------------
bsps/powerpc/gen5200/irq/irq.c | 94 ++++--------------
bsps/powerpc/gen5200/slicetimer/slicetimer.c | 142 +++++++++------------------
bsps/powerpc/gen5200/start/bspstart.c | 141 +++++++++-----------------
bsps/powerpc/gen5200/start/start.S | 135 +++++++++----------------
7 files changed, 262 insertions(+), 617 deletions(-)
diff --git a/bsps/powerpc/gen5200/console/console.c b/bsps/powerpc/gen5200/console/console.c
index 7b7a704..8f7129f 100644
--- a/bsps/powerpc/gen5200/console/console.c
+++ b/bsps/powerpc/gen5200/console/console.c
@@ -1,99 +1,42 @@
-/*===============================================================*\
-| Project: RTEMS generic MPC5200 BSP |
-+-----------------------------------------------------------------+
-| Partially based on the code references which are named below. |
-| Adaptions, modifications, enhancements and any recent parts of |
-| the code are: |
-| Copyright (c) 2005 |
-| embedded brains GmbH |
-| Obere Lagerstr. 30 |
-| 82178 Puchheim |
-| Germany |
-| rtems at embedded-brains.de |
-+-----------------------------------------------------------------+
-| The license and distribution terms for this file may be |
-| found in the file LICENSE in this distribution or at |
-| |
-| http://www.rtems.org/license/LICENSE. |
-| |
-+-----------------------------------------------------------------+
-| this file contains the console driver functions |
-\*===============================================================*/
-/***********************************************************************/
-/* */
-/* Module: console.c */
-/* Date: 07/17/2003 */
-/* Purpose: RTEMS MPC5x00 console driver */
-/* */
-/*---------------------------------------------------------------------*/
-/* */
-/* Description: */
-/* */
-/* The PSCs of mpc5200 are assigned as follows */
-/* */
-/* Channel Device Minor Note */
-/* PSC1 /dev/tty0 0 */
-/* PSC2 /dev/tty1 1 */
-/* PSC3 /dev/tty2 2 */
-/* */
-/*---------------------------------------------------------------------*/
-/* */
-/* Code */
-/* References: Serial driver for MPC8260ads */
-/* Module: console-generic.c */
-/* Project: RTEMS 4.6.0pre1 / MPC8260ads BSP */
-/* Version 1.3 */
-/* Date: 2002/11/04 */
-/* */
-/* Author(s) / Copyright(s): */
-/* */
-/* Author: Jay Monkman (jmonkman at frasca.com) */
-/* Copyright (C) 1998 by Frasca International, Inc. */
-/* */
-/* Derived from c/src/lib/libbsp/m68k/gen360/console/console.c */
-/* written by: */
-/* W. Eric Norum */
-/* Saskatchewan Accelerator Laboratory */
-/* University of Saskatchewan */
-/* Saskatoon, Saskatchewan, CANADA */
-/* eric at skatter.usask.ca */
-/* */
-/* COPYRIGHT (c) 1989-2008. */
-/* On-Line Applications Research Corporation (OAR). */
-/* */
-/* Modifications by Darlene Stewart <Darlene.Stewart at iit.nrc.ca> */
-/* and Charles-Antoine Gauthier <charles.gauthier at iit.nrc.ca> */
-/* Copyright (c) 1999, National Research Council of Canada */
-/* */
-/* Modifications by Andy Dachs <a.dachs at sstl.co.uk> to add MPC8260 */
-/* support. */
-/* Copyright (c) 2001, Surrey Satellite Technology Ltd */
-/* */
-/* The license and distribution terms for this file may be */
-/* found in the file LICENSE in this distribution or at */
-/* http://www.rtems.org/license/LICENSE. */
-/* */
-/*---------------------------------------------------------------------*/
-/* */
-/* Partially based on the code references which are named above. */
-/* Adaptions, modifications, enhancements and any recent parts of */
-/* the code are under the right of */
-/* */
-/* IPR Engineering, Dachauer Straße 38, D-80335 München */
-/* Copyright(C) 2003 */
-/* */
-/*---------------------------------------------------------------------*/
-/* */
-/* IPR Engineering makes no representation or warranties with */
-/* respect to the performance of this computer program, and */
-/* specifically disclaims any responsibility for any damages, */
-/* special or consequential, connected with the use of this program. */
-/* */
-/*---------------------------------------------------------------------*/
-/* */
-/* Version history: 1.0 */
-/* */
-/***********************************************************************/
+/*
+ * RTEMS generic MPC5200 BSP
+ *
+ * This file contains the console driver functions.
+ *
+ * The PSCs of mpc5200 are assigned as follows
+ *
+ * Channel Device Minor Note
+ * PSC1 /dev/tty0 0
+ * PSC2 /dev/tty1 1
+ * PSC3 /dev/tty2 2
+ */
+
+/*
+ * Author: Jay Monkman (jmonkman at frasca.com)
+ * Copyright (C) 1998 by Frasca International, Inc.
+ *
+ * Derived from c/src/lib/libbsp/m68k/gen360/console/console.c
+ * Author: W. Eric Norum <eric at skatter.usask.ca>
+ * Saskatchewan Accelerator Laboratory, University of Saskatchewan, CANADA
+ *
+ * COPYRIGHT (c) 1989, 2008.
+ * On-Line Applications Research Corporation (OAR).
+ *
+ * Modifications by Darlene Stewart <Darlene.Stewart at iit.nrc.ca>
+ * and Charles-Antoine Gauthier <charles.gauthier at iit.nrc.ca>
+ * Copyright (c) 1999, National Research Council of Canada
+ *
+ * Modifications by Andy Dachs <a.dachs at sstl.co.uk> to add MPC8260 support.
+ * Copyright (c) 2001, Surrey Satellite Technology Ltd
+ *
+ * Copyright (c) 2003, IPR Engineering
+ *
+ * Copyright (c) 2005 embedded brains GmbH. All rights reserved.
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
#include <assert.h>
#include <string.h>
diff --git a/bsps/powerpc/gen5200/include/bsp/irq.h b/bsps/powerpc/gen5200/include/bsp/irq.h
index 61f9cdb..72f12c1 100644
--- a/bsps/powerpc/gen5200/include/bsp/irq.h
+++ b/bsps/powerpc/gen5200/include/bsp/irq.h
@@ -1,88 +1,38 @@
-/*===============================================================*\
-| Project: RTEMS generic MPC5200 BSP |
-+-----------------------------------------------------------------+
-| Partially based on the code references which are named below. |
-| Adaptions, modifications, enhancements and any recent parts of |
-| the code are: |
-| Copyright (c) 2005, 2010 |
-| embedded brains GmbH |
-| Obere Lagerstr. 30 |
-| 82178 Puchheim |
-| Germany |
-| rtems at embedded-brains.de |
-+-----------------------------------------------------------------+
-| The license and distribution terms for this file may be |
-| found in the file LICENSE in this distribution or at |
-| |
-| http://www.rtems.org/license/LICENSE. |
-| |
-+-----------------------------------------------------------------+
-| this file contains declarations for the irq controller handler |
-\*===============================================================*/
-/***********************************************************************/
-/* */
-/* Module: irq.h */
-/* Date: 07/17/2003 */
-/* Purpose: RTEMS MPC5x00 CPU interrupt header file */
-/* */
-/*---------------------------------------------------------------------*/
-/* */
-/* Description: This include file describe the data structure and */
-/* the functions implemented by rtems to write */
-/* interrupt handlers. */
-/* */
-/*---------------------------------------------------------------------*/
-/* */
-/* Code */
-/* References: MPC8260ads CPU interrupt header file */
-/* Module: irq.h */
-/* Project: RTEMS 4.6.0pre1 / MCF8260ads BSP */
-/* Version 1.1 */
-/* Date: 10/10/2002 */
-/* */
-/* Author(s) / Copyright(s): */
-/* */
-/* Copyright (C) 1999 valette at crf.canon.fr */
-/* */
-/* This code is heavilly inspired by the public specification of */
-/* STREAM V2 that can be found at: */
-/* */
-/* <http://www.chorus.com/Documentation/index.html> by following */
-/* the STREAM API Specification Document link. */
-/* */
-/* Modified for mpc8260 by Andy Dachs <a.dachs at sstl.co.uk> */
-/* Surrey Satellite Technology Limited */
-/* The interrupt handling on the mpc8260 seems quite different from */
-/* the 860 (I don't know the 860 well). Although some interrupts */
-/* are routed via the CPM irq and some are direct to the SIU they */
-/* all appear logically the same.Therefore I removed the distinction */
-/* between SIU and CPM interrupts. */
-/* */
-/* The license and distribution terms for this file may be */
-/* found in the file LICENSE in this distribution or at */
-/* http://www.rtems.org/license/LICENSE. */
-/* */
-/*---------------------------------------------------------------------*/
-/* */
-/* Partially based on the code references which are named above. */
-/* Adaptions, modifications, enhancements and any recent parts of */
-/* the code are under the right of */
-/* */
-/* IPR Engineering, Dachauer Straße 38, D-80335 München */
-/* Copyright(C) 2003 */
-/* */
-/*---------------------------------------------------------------------*/
-/* */
-/* IPR Engineering makes no representation or warranties with */
-/* respect to the performance of this computer program, and */
-/* specifically disclaims any responsibility for any damages, */
-/* special or consequential, connected with the use of this program. */
-/* */
-/*---------------------------------------------------------------------*/
-/* */
-/* Version history: 1.0 */
-/* */
-/***********************************************************************/
+/*
+ * RTEMS generic MPC5200 BSP
+ *
+ * This file contains declarations for the irq controller handler.
+ *
+ * References: MPC8260ads CPU interrupt header file.
+ * Comment for that:
+ *
+ * This code is heavilly inspired by the public specification of
+ * STREAM V2 that can be found at:
+ *
+ * <http://www.chorus.com/Documentation/index.html> by following
+ * the STREAM API Specification Document link.
+ *
+ * The interrupt handling on the mpc8260 seems quite different from
+ * the 860 (I don't know the 860 well). Although some interrupts
+ * are routed via the CPM irq and some are direct to the SIU they
+ * all appear logically the same.Therefore I removed the distinction
+ * between SIU and CPM interrupts.
+ */
+
+/*
+ * Copyright (C) 1999 valette at crf.canon.fr
+ *
+ * Modified for mpc8260 by Andy Dachs <a.dachs at sstl.co.uk>
+ * Surrey Satellite Technology Limited
+ *
+ * Copyright (c) 2003 IPR Engineering
+ *
+ * Copyright (c) 2005, 2010 embedded brains GmbH. All rights reserved.
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
#ifndef LIBBSP_POWERPC_GEN5200_IRQ_H
#define LIBBSP_POWERPC_GEN5200_IRQ_H
diff --git a/bsps/powerpc/gen5200/include/bsp/nvram.h b/bsps/powerpc/gen5200/include/bsp/nvram.h
index 8a44b2f..9abcf9d 100644
--- a/bsps/powerpc/gen5200/include/bsp/nvram.h
+++ b/bsps/powerpc/gen5200/include/bsp/nvram.h
@@ -1,81 +1,37 @@
-/*===============================================================*\
-| Project: RTEMS generic MPC5200 BSP |
-+-----------------------------------------------------------------+
-| Partially based on the code references which are named below. |
-| Adaptions, modifications, enhancements and any recent parts of |
-| the code are: |
-| Copyright (c) 2005 |
-| embedded brains GmbH |
-| Obere Lagerstr. 30 |
-| 82178 Puchheim |
-| Germany |
-| rtems at embedded-brains.de |
-+-----------------------------------------------------------------+
-| The license and distribution terms for this file may be |
-| found in the file LICENSE in this distribution or at |
-| |
-| http://www.rtems.org/license/LICENSE. |
-| |
-+-----------------------------------------------------------------+
-| this file contains the nvram declarations |
-\*===============================================================*/
-/***********************************************************************/
-/* */
-/* Module: nvram.h */
-/* Date: 07/17/2003 */
-/* Purpose: RTEMS M93C64-based header file */
-/* */
-/*---------------------------------------------------------------------*/
-/* */
-/* Description: M93C46 is a serial microwire EEPROM which contains */
-/* 1Kbit (128 bytes/64 words) of non-volatile memory. */
-/* The device can be configured for byte- or word- */
-/* access. The driver provides a file-like interface */
-/* to this memory. */
-/* */
-/* MPC5x00 PIN settings: */
-/* */
-/* PSC3_6 (output) -> MC93C46 serial data in (D) */
-/* PSC3_7 (input) -> MC93C46 serial data out (Q) */
-/* PSC3_8 (output) -> MC93C46 chip select input (S) */
-/* PSC3_9 (output) -> MC93C46 serial clock (C) */
-/* */
-/*---------------------------------------------------------------------*/
-/* */
-/* Code */
-/* References: DS1307-based Non-Volatile memory device driver */
-/* Module: nvram.h */
-/* Project: RTEMS 4.6.0pre1 / MCF5206Elite BSP */
-/* Version 1.1 */
-/* Date: 10/26/2001 */
-/* Author: Victor V. Vengerov */
-/* Copyright: Copyright (C) 2000 OKTET Ltd.,St.-Petersburg,Russia */
-/* */
-/* The license and distribution terms for this file may be */
-/* found in the file LICENSE in this distribution or at */
-/* http://www.rtems.org/license/LICENSE. */
-/* */
-/*---------------------------------------------------------------------*/
-/* */
-/* Partially based on the code references which are named above. */
-/* Adaptions, modifications, enhancements and any recent parts of */
-/* the code are under the right of */
-/* */
-/* IPR Engineering, Dachauer Straße 38, D-80335 München */
-/* Copyright(C) 2003 */
-/* */
-/*---------------------------------------------------------------------*/
-/* */
-/* IPR Engineering makes no representation or warranties with */
-/* respect to the performance of this computer program, and */
-/* specifically disclaims any responsibility for any damages, */
-/* special or consequential, connected with the use of this program. */
-/* */
-/*---------------------------------------------------------------------*/
-/* */
-/* Version history: 1.0 */
-/* */
-/***********************************************************************/
+/*
+ * RTEMS generic MPC5200 BSP
+ *
+ * This file contains the nvram declarations.
+ *
+ * M93C46 is a serial microwire EEPROM which contains
+ * 1Kbit (128 bytes/64 words) of non-volatile memory.
+ * The device can be configured for byte- or word-
+ * access. The driver provides a file-like interface
+ * to this memory.
+ *
+ * MPC5x00 PIN settings:
+ *
+ * PSC3_6 (output) -> MC93C46 serial data in (D)
+ * PSC3_7 (input) -> MC93C46 serial data out (Q)
+ * PSC3_8 (output) -> MC93C46 chip select input (S)
+ * PSC3_9 (output) -> MC93C46 serial clock (C)
+ *
+ * References: DS1307-based Non-Volatile memory device driver
+ * by Victor V. Vengerov.
+ */
+
+/*
+ * Author: Victor V. Vengerov
+ * Copyright (c) 2000 OKTET Ltd.,St.-Petersburg,Russia
+ *
+ * Copyright (c) 2003 IPR Engineering
+ *
+ * Copyright (c) 2005 embedded brains GmbH. All rights reserved.
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
#ifndef __NVRAM_H__
#define __NVRAM_H__
diff --git a/bsps/powerpc/gen5200/irq/irq.c b/bsps/powerpc/gen5200/irq/irq.c
index d412f46..665ea7c 100644
--- a/bsps/powerpc/gen5200/irq/irq.c
+++ b/bsps/powerpc/gen5200/irq/irq.c
@@ -1,77 +1,23 @@
-/*===============================================================*\
-| Project: RTEMS generic MPC5200 BSP |
-+-----------------------------------------------------------------+
-| Partially based on the code references which are named below. |
-| Adaptions, modifications, enhancements and any recent parts of |
-| the code are: |
-| Copyright (c) 2005 |
-| embedded brains GmbH |
-| Obere Lagerstr. 30 |
-| 82178 Puchheim |
-| Germany |
-| rtems at embedded-brains.de |
-+-----------------------------------------------------------------+
-| The license and distribution terms for this file may be |
-| found in the file LICENSE in this distribution or at |
-| |
-| http://www.rtems.org/license/LICENSE. |
-| |
-+-----------------------------------------------------------------+
-| this file contains the irq controller handler |
-\*===============================================================*/
-/***********************************************************************/
-/* */
-/* Module: irq.c */
-/* Date: 07/17/2003 */
-/* Purpose: RTEMS MPC5x00 CPU main interrupt handler & routines */
-/* */
-/*---------------------------------------------------------------------*/
-/* */
-/* Description: This file contains the implementation of the */
-/* functions described in irq.h */
-/* */
-/*---------------------------------------------------------------------*/
-/* */
-/* Code */
-/* References: MPC8260ads main interrupt handler & routines */
-/* Module: irc.c */
-/* Project: RTEMS 4.6.0pre1 / MCF8260ads BSP */
-/* Version 1.2 */
-/* Date: 04/18/2002 */
-/* */
-/* Author(s) / Copyright(s): */
-/* */
-/* Copyright (C) 1998, 1999 valette at crf.canon.fr */
-/* */
-/* Modified for mpc8260 Andy Dachs <a.dachs at sstl.co.uk> */
-/* Surrey Satellite Technology Limited, 2000 */
-/* Nested exception handlers not working yet. */
-/* */
-/* The license and distribution terms for this file may be */
-/* found in the file LICENSE in this distribution or at */
-/* http://www.rtems.org/license/LICENSE. */
-/* */
-/*---------------------------------------------------------------------*/
-/* */
-/* Partially based on the code references which are named above. */
-/* Adaptions, modifications, enhancements and any recent parts of */
-/* the code are under the right of */
-/* */
-/* IPR Engineering, Dachauer Straße 38, D-80335 München */
-/* Copyright(C) 2003 */
-/* */
-/*---------------------------------------------------------------------*/
-/* */
-/* IPR Engineering makes no representation or warranties with */
-/* respect to the performance of this computer program, and */
-/* specifically disclaims any responsibility for any damages, */
-/* special or consequential, connected with the use of this program. */
-/* */
-/*---------------------------------------------------------------------*/
-/* */
-/* Version history: 1.0 */
-/* */
-/***********************************************************************/
+/*
+ * RTEMS generic MPC5200 BSP
+ *
+ * This file contains the irq controller handler.
+ */
+
+/*
+ * Copyright (c) 1998, 1999 valette at crf.canon.fr
+ *
+ * Copyright (c) 2000 Andy Dachs <a.dachs at sstl.co.uk>
+ * Surrey Satellite Technology Limited
+ *
+ * Copyright (c) 2003 IPR Engineering. All rights reserved.
+ *
+ * Copyright (c) 2005 embedded brains GmbH. All rights reserved.
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
#include <inttypes.h>
diff --git a/bsps/powerpc/gen5200/slicetimer/slicetimer.c b/bsps/powerpc/gen5200/slicetimer/slicetimer.c
index 66c7f09..d99e0ed 100644
--- a/bsps/powerpc/gen5200/slicetimer/slicetimer.c
+++ b/bsps/powerpc/gen5200/slicetimer/slicetimer.c
@@ -1,101 +1,47 @@
-/*===============================================================*\
-| Project: RTEMS generic MPC5200 BSP |
-+-----------------------------------------------------------------+
-| Partially based on the code references which are named below. |
-| Adaptions, modifications, enhancements and any recent parts of |
-| the code are: |
-| Copyright (c) 2005 |
-| embedded brains GmbH |
-| Obere Lagerstr. 30 |
-| 82178 Puchheim |
-| Germany |
-| rtems at embedded-brains.de |
-+-----------------------------------------------------------------+
-| The license and distribution terms for this file may be |
-| found in the file LICENSE in this distribution or at |
-| |
-| http://www.rtems.org/license/LICENSE. |
-| |
-+-----------------------------------------------------------------+
-| this file contains functions to implement a slice timer |
-\*===============================================================*/
-/***********************************************************************/
-/* */
-/* Module: slicetimer.c */
-/* Date: 07/17/2003 */
-/* Purpose: RTEMS MPC5x00 slicetimer driver */
-/* */
-/*---------------------------------------------------------------------*/
-/* */
-/* Description: MPC5x00 slice timer routines for cyclic short time */
-/* trigger */
-/* */
-/*---------------------------------------------------------------------*/
-/* */
-/* Code */
-/* References: Clock driver for PPC403 */
-/* Module: clock.c */
-/* Project: RTEMS 4.6.0pre1 / PPC403 BSP */
-/* Version 1.16 */
-/* Date: 2002/11/01 */
-/* Author(s) / Copyright(s): */
-/* */
-/* Author: Jay Monkman (jmonkman at frasca.com) */
-/* Copyright (C) 1998 by Frasca International, Inc. */
-/* */
-/* Derived from c/src/lib/libcpu/ppc/ppc403/clock/clock.c: */
-/* */
-/* Author: Andrew Bray <andy at i-cubed.co.uk> */
-/* */
-/* COPYRIGHT (c) 1995 by i-cubed ltd. */
-/* */
-/* To anyone who acknowledges that this file is provided "AS IS" */
-/* without any express or implied warranty: */
-/* permission to use, copy, modify, and distribute this file */
-/* for any purpose is hereby granted without fee, provided that */
-/* the above copyright notice and this notice appears in all */
-/* copies, and that the name of i-cubed limited not be used in */
-/* advertising or publicity pertaining to distribution of the */
-/* software without specific, written prior permission. */
-/* i-cubed limited makes no representations about the suitability */
-/* of this software for any purpose. */
-/* */
-/* Derived from c/src/lib/libcpu/hppa1.1/clock/clock.c: */
-/* */
-/* Modifications for deriving timer clock from cpu system clock by */
-/* Thomas Doerfler <td at imd.m.isar.de> */
-/* for these modifications: */
-/* COPYRIGHT (c) 1997 by IMD, Puchheim, Germany. */
-/* */
-/* COPYRIGHT (c) 1989-1999. */
-/* On-Line Applications Research Corporation (OAR). */
-/* */
-/* The license and distribution terms for this file may be */
-/* found in the file LICENSE in this distribution or at */
-/* http://www.rtems.org/license/LICENSE. */
-/* */
-/* Modifications for PPC405GP by Dennis Ehlin */
-/*---------------------------------------------------------------------*/
-/* */
-/* Partially based on the code references which are named above. */
-/* Adaptions, modifications, enhancements and any recent parts of */
-/* the code are under the right of */
-/* */
-/* IPR Engineering, Dachauer Straße 38, D-80335 München */
-/* Copyright(C) 2003 */
-/* */
-/*---------------------------------------------------------------------*/
-/* */
-/* IPR Engineering makes no representation or warranties with */
-/* respect to the performance of this computer program, and */
-/* specifically disclaims any responsibility for any damages, */
-/* special or consequential, connected with the use of this program. */
-/* */
-/*---------------------------------------------------------------------*/
-/* */
-/* Version history: 1.0 */
-/* */
-/***********************************************************************/
+/*
+ * RTEMS generic MPC5200 BSP
+ *
+ * This file contains functions to implement a slice timer.
+ *
+ * References: Clock driver for PPC403
+ */
+
+/*
+ * Author: Jay Monkman (jmonkman at frasca.com)
+ * Copyright (C) 1998 by Frasca International, Inc.
+ *
+ * Derived from c/src/lib/libcpu/ppc/ppc403/clock/clock.c:
+ * Author: Andrew Bray <andy at i-cubed.co.uk>
+ *
+ * Copyright (c) 1995 by i-cubed ltd.
+ *
+ * To anyone who acknowledges that this file is provided "AS IS"
+ * without any express or implied warranty:
+ * permission to use, copy, modify, and distribute this file
+ * for any purpose is hereby granted without fee, provided that
+ * the above copyright notice and this notice appears in all
+ * copies, and that the name of i-cubed limited not be used in
+ * advertising or publicity pertaining to distribution of the
+ * software without specific, written prior permission.
+ * i-cubed limited makes no representations about the suitability
+ * of this software for any purpose.
+ *
+ * Modifications for deriving timer clock from cpu system clock by
+ * Copyright (c) 1997 by Ingenieurbuero fuer Microcomputertechnik Th. Doerfler
+ *
+ * COPYRIGHT (c) 1989-1999.
+ * On-Line Applications Research Corporation (OAR).
+ *
+ * Copyright (c) 2003 IPR Engineering
+ *
+ * Copyright (c) 2005 embedded brains GmbH. All rights reserved.
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ *
+ * Modifications for PPC405GP by Dennis Ehlin
+ */
#include <bsp.h>
#include <rtems/bspIo.h>
diff --git a/bsps/powerpc/gen5200/start/bspstart.c b/bsps/powerpc/gen5200/start/bspstart.c
index b21ec48..a776ff9 100644
--- a/bsps/powerpc/gen5200/start/bspstart.c
+++ b/bsps/powerpc/gen5200/start/bspstart.c
@@ -1,98 +1,49 @@
-/*===============================================================*\
-| Project: RTEMS generic MPC5200 BSP |
-+-----------------------------------------------------------------+
-| Partially based on the code references which are named below. |
-| Adaptions, modifications, enhancements and any recent parts of |
-| the code are: |
-| Copyright (c) 2005 |
-| embedded brains GmbH |
-| Obere Lagerstr. 30 |
-| 82178 Puchheim |
-| Germany |
-| rtems at embedded-brains.de |
-+-----------------------------------------------------------------+
-| The license and distribution terms for this file may be |
-| found in the file LICENSE in this distribution or at |
-| |
-| http://www.rtems.org/license/LICENSE. |
-| |
-+-----------------------------------------------------------------+
-| this file contains the BSP initialization code |
-\*===============================================================*/
-/***********************************************************************/
-/* */
-/* Module: bspstart.c */
-/* Date: 07/17/2003 */
-/* Purpose: RTEMS MPC5x00 C level startup code */
-/* */
-/*---------------------------------------------------------------------*/
-/* */
-/* Description: This routine starts the application. It includes */
-/* application, board, and monitor specific */
-/* initialization and configuration. The generic CPU */
-/* dependent initialization has been performed before */
-/* this routine is invoked. */
-/* */
-/*---------------------------------------------------------------------*/
-/* */
-/* Code */
-/* References: MPC8260ads C level startup code */
-/* Module: bspstart.c */
-/* Project: RTEMS 4.6.0pre1 / MCF8260ads BSP */
-/* Version 1.2 */
-/* Date: 04/17/2002 */
-/* */
-/* Author(s) / Copyright(s): */
-/* */
-/* The MPC860 specific stuff was written by Jay Monkman */
-/* (jmonkman at frasca.com) */
-/* */
-/* Modified for the MPC8260ADS board by Andy Dachs */
-/* <a.dachs at sstl.co.uk> */
-/* Surrey Satellite Technology Limited, 2001 */
-/* A 40MHz system clock is assumed. */
-/* The PON. RST.CONF. Dip switches (DS1) are */
-/* 1 - Off */
-/* 2 - On */
-/* 3 - Off */
-/* 4 - On */
-/* 5 - Off */
-/* 6 - Off */
-/* 7 - Off */
-/* 8 - Off */
-/* Dip switches on DS2 and DS3 are all set to ON */
-/* The LEDs on the board are used to signal panic and fatal_error */
-/* conditions. */
-/* The mmu is unused at this time. */
-/* */
-/* COPYRIGHT (c) 1989-2007. */
-/* On-Line Applications Research Corporation (OAR). */
-/* */
-/* The license and distribution terms for this file may be */
-/* found in the file LICENSE in this distribution or at */
-/* http://www.rtems.org/license/LICENSE. */
-/* */
-/*---------------------------------------------------------------------*/
-/* */
-/* Partially based on the code references which are named above. */
-/* Adaptions, modifications, enhancements and any recent parts of */
-/* the code are under the right of */
-/* */
-/* IPR Engineering, Dachauer Straße 38, D-80335 München */
-/* Copyright(C) 2003 */
-/* */
-/*---------------------------------------------------------------------*/
-/* */
-/* IPR Engineering makes no representation or warranties with */
-/* respect to the performance of this computer program, and */
-/* specifically disclaims any responsibility for any damages, */
-/* special or consequential, connected with the use of this program. */
-/* */
-/*---------------------------------------------------------------------*/
-/* */
-/* Version history: 1.0 */
-/* */
-/***********************************************************************/
+/*
+ * RTEMS generic MPC5200 BSP
+ *
+ * This file contains the BSP initialization code
+ *
+ * This routine starts the application. It includes
+ * application, board, and monitor specific
+ * initialization and configuration. The generic CPU
+ * dependent initialization has been performed before
+ * this routine is invoked.
+ *
+ * The MPC860 specific stuff was written by Jay Monkman.
+ * Modified for the MPC8260ADS board by Andy Dachs.
+ *
+ * A 40MHz system clock is assumed.
+ * The PON. RST.CONF. Dip switches (DS1) are
+ * 1 - Off
+ * 2 - On
+ * 3 - Off
+ * 4 - On
+ * 5 - Off
+ * 6 - Off
+ * 7 - Off
+ * 8 - Off
+ * Dip switches on DS2 and DS3 are all set to ON
+ * The LEDs on the board are used to signal panic and fatal_error
+ * conditions.
+ * The mmu is unused at this time.
+ */
+
+/*
+ * Copyright (c) 1989, 2007 On-Line Applications Research Corporation (OAR).
+ *
+ * Copyright (c) Jay Monkman (jmonkman at frasca.com)
+ *
+ * Copyright (c) 2001 Andy Dachs <a.dachs at sstl.co.uk>
+ * Surrey Satellite Technology Limited
+ *
+ * Copyright (c) 2003 IPR Engineering
+ *
+ * Copyright (c) 2005 embedded brains GmbH. All rights reserved.
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
#include <rtems.h>
#include <rtems/counter.h>
diff --git a/bsps/powerpc/gen5200/start/start.S b/bsps/powerpc/gen5200/start/start.S
index e506bc6..54271d6 100644
--- a/bsps/powerpc/gen5200/start/start.S
+++ b/bsps/powerpc/gen5200/start/start.S
@@ -1,94 +1,47 @@
-/*===============================================================*\
-| Project: RTEMS generic MPC5200 BSP |
-+-----------------------------------------------------------------+
-| Partially based on the code references which are named below. |
-| Adaptions, modifications, enhancements and any recent parts of |
-| the code are: |
-| Copyright (c) 2005 |
-| embedded brains GmbH |
-| Obere Lagerstr. 30 |
-| 82178 Puchheim |
-| Germany |
-| rtems at embedded-brains.de |
-+-----------------------------------------------------------------+
-| The license and distribution terms for this file may be |
-| found in the file LICENSE in this distribution or at |
-| |
-| http://www.rtems.org/license/LICENSE. |
-| |
-+-----------------------------------------------------------------+
-| this file contains the startup assembly code |
-\*===============================================================*/
-/***********************************************************************/
-/* */
-/* Module: start.S */
-/* Date: 07/17/2003 */
-/* Purpose: RTEMS MPC5x00 CPU assembly startup */
-/* */
-/*---------------------------------------------------------------------*/
-/* */
-/* Description: This file contains the assembler portion of MPC5x00 */
-/* startup code */
-/* */
-/*---------------------------------------------------------------------*/
-/* */
-/* Code */
-/* References: startup code for Motorola PQII ADS board */
-/* Module: start.S */
-/* Project: RTEMS 4.6.0pre1 / MCF8260ads BSP */
-/* Version 1.2 */
-/* Date: 04/18/2002 */
-/* */
-/* Author(s) / Copyright(s): */
-/* */
-/* Modified for the Motorola PQII ADS board by */
-/* Andy Dachs <a.dachs at sstl.co.uk> 23-11-00. */
-/* Surrey Satellite Technology Limited */
-/* */
-/* I have a proprietary bootloader programmed into the flash */
-/* on the board which initialises the SDRAM prior to calling */
-/* this function. */
-/* */
-/* This file is based on the one by Jay Monkman (jmonkman at fracsa.com)*/
-/* which in turn was based on the dlentry.s file for the Papyrus BSP,*/
-/* written by: */
-/* */
-/* Author: Andrew Bray <andy at i-cubed.co.uk> */
-/* */
-/* COPYRIGHT (c) 1995 by i-cubed ltd. */
-/* */
-/* To anyone who acknowledges that this file is provided "AS IS" */
-/* without any express or implied warranty: */
-/* permission to use, copy, modify, and distribute this file */
-/* for any purpose is hereby granted without fee, provided that */
-/* the above copyright notice and this notice appears in all */
-/* copies, and that the name of i-cubed limited not be used in */
-/* advertising or publicity pertaining to distribution of the */
-/* software without specific, written prior permission. */
-/* i-cubed limited makes no representations about the suitability */
-/* of this software for any purpose. */
-/* */
-/*---------------------------------------------------------------------*/
-/* */
-/* Partially based on the code references which are named above. */
-/* Adaptions, modifications, enhancements and any recent parts of */
-/* the code are under the right of */
-/* */
-/* IPR Engineering, Dachauer Straße 38, D-80335 München */
-/* Copyright(C) 2003 */
-/* */
-/*---------------------------------------------------------------------*/
-/* */
-/* IPR Engineering makes no representation or warranties with */
-/* respect to the performance of this computer program, and */
-/* specifically disclaims any responsibility for any damages, */
-/* special or consequential, connected with the use of this program. */
-/* */
-/*---------------------------------------------------------------------*/
-/* */
-/* Version history: 1.0 */
-/* */
-/***********************************************************************/
+/*
+ * RTEMS generic MPC5200 BSP
+ *
+ * This file contains the startup assembly code.
+ *
+ * References: startup code for Motorola PQII ADS board.
+ * Modified for the Motorola PQII ADS board by Andy Dachs.
+ * Comment for the original code:
+ *
+ * I have a proprietary bootloader programmed into the flash
+ * on the board which initialises the SDRAM prior to calling
+ * this function.
+ */
+
+/*
+ * Modified for the Motorola PQII ADS board by
+ * Andy Dachs <a.dachs at sstl.co.uk> 23-11-00.
+ * Surrey Satellite Technology Limited
+ *
+ * Based on the one by Jay Monkman (jmonkman at fracsa.com)
+ * which in turn was based on the dlentry.s file for the Papyrus BSP,
+ * written by:
+ *
+ * Author: Andrew Bray <andy at i-cubed.co.uk>
+ * Copyright (c) 1995 by i-cubed ltd.
+ *
+ * To anyone who acknowledges that this file is provided "AS IS"
+ * without any express or implied warranty:
+ * permission to use, copy, modify, and distribute this file
+ * for any purpose is hereby granted without fee, provided that
+ * the above copyright notice and this notice appears in all
+ * copies, and that the name of i-cubed limited not be used in
+ * advertising or publicity pertaining to distribution of the
+ * software without specific, written prior permission.
+ * i-cubed limited makes no representations about the suitability
+ * of this software for any purpose.
+ *
+ * Copyright (c) 2003 IPR Engineering
+ * Copyright (c) 2005 embedded brains GmbH. All rights reserved.
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
#include <rtems/asm.h>
#include <rtems/powerpc/cache.h>
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