[rtems commit] bsps/riscv: Improve bsp_interrupt_vector_enable()

[Sebastian Huber]

Module:    rtems
Branch:    master
Commit:    e19d490fbe8d4f6f0cc3a5e7f97b7623d02684b5
Changeset: http://git.rtems.org/rtems/commit/?id=e19d490fbe8d4f6f0cc3a5e7f97b7623d02684b5

Author:    Sebastian Huber <sebastian.huber at embedded-brains.de>
Date:      Wed Nov  9 08:19:12 2022 +0100

bsps/riscv: Improve bsp_interrupt_vector_enable()

Add support for hart-specific software and timer interrupts.

---

 bsps/riscv/riscv/irq/irq.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/bsps/riscv/riscv/irq/irq.c b/bsps/riscv/riscv/irq/irq.c
index 8de9e47cbc..3bce33ae13 100644
--- a/bsps/riscv/riscv/irq/irq.c
+++ b/bsps/riscv/riscv/irq/irq.c
@@ -437,8 +437,16 @@ rtems_status_code bsp_interrupt_vector_enable(rtems_vector_number vector)
     }
 
     rtems_interrupt_lock_release(&riscv_plic_lock, &lock_context);
+    return RTEMS_SUCCESSFUL;
+  }
+
+  if (vector == RISCV_INTERRUPT_VECTOR_TIMER) {
+    set_csr(mie, MIP_MTIP);
+    return RTEMS_SUCCESSFUL;
   }
 
+  _Assert(vector == RISCV_INTERRUPT_VECTOR_SOFTWARE);
+  set_csr(mie, MIP_MSIP);
   return RTEMS_SUCCESSFUL;
 }