[rtems commit] build: Enable RISCV_BOOT_HARTID only for riscv

[Sebastian Huber]

Module:    rtems
Branch:    master
Commit:    97fce5120c08180a86301b03e61d0a06db5f8b9b
Changeset: http://git.rtems.org/rtems/commit/?id=97fce5120c08180a86301b03e61d0a06db5f8b9b

Author:    Sebastian Huber <sebastian.huber at embedded-brains.de>
Date:      Thu Oct 13 06:23:30 2022 +0200

build: Enable RISCV_BOOT_HARTID only for riscv

---

 spec/build/cpukit/optboothartid.yml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/spec/build/cpukit/optboothartid.yml b/spec/build/cpukit/optboothartid.yml
index ede4e5ead8..f6cf6da6d4 100644
--- a/spec/build/cpukit/optboothartid.yml
+++ b/spec/build/cpukit/optboothartid.yml
@@ -12,7 +12,7 @@ default-by-variant:
   - riscv/mpfs64.*
 description: |
   boot hartid (processor number) of risc-v cpu (default 0)
-enabled-by: true
+enabled-by: riscv
 format: '{}'
 links: []
 name: RISCV_BOOT_HARTID