[rtems commit] aarch64/versal: Fix uart interrupt issues

Chris Johns chrisj at rtems.org
Tue May 16 03:41:05 UTC 2023


Module:    rtems
Branch:    master
Commit:    94a7d17b090c16b0d65b92278d7c595113b3f750
Changeset: http://git.rtems.org/rtems/commit/?id=94a7d17b090c16b0d65b92278d7c595113b3f750

Author:    Aaron Nyholm <aaron.nyholm at southerninnovation.com>
Date:      Thu Mar 16 11:42:09 2023 +1100

aarch64/versal: Fix uart interrupt issues

---

 bsps/aarch64/xilinx-versal/dev/serial/versal-uart.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/bsps/aarch64/xilinx-versal/dev/serial/versal-uart.c b/bsps/aarch64/xilinx-versal/dev/serial/versal-uart.c
index b009f83c37..bf469f66b2 100644
--- a/bsps/aarch64/xilinx-versal/dev/serial/versal-uart.c
+++ b/bsps/aarch64/xilinx-versal/dev/serial/versal-uart.c
@@ -31,7 +31,6 @@
 
 #include <bspopts.h>
 
-#ifdef VERSAL_CONSOLE_USE_INTERRUPTS
 static uint32_t versal_uart_intr_all(void)
 {
   return VERSAL_UARTI_OEI |
@@ -47,6 +46,7 @@ static uint32_t versal_uart_intr_all(void)
     VERSAL_UARTI_RIMI;
 }
 
+#ifdef VERSAL_CONSOLE_USE_INTERRUPTS
 static void versal_uart_intr_clear(volatile versal_uart *regs, uint32_t ints)
 {
   regs->uarticr = ints;
@@ -61,6 +61,7 @@ static void versal_uart_intr_enable(volatile versal_uart *regs, uint32_t ints)
 {
   regs->uartimsc |= ints;
 }
+#endif
 
 static void versal_uart_intr_disable(volatile versal_uart *regs, uint32_t ints)
 {
@@ -72,6 +73,7 @@ static void versal_uart_intr_disableall(volatile versal_uart *regs)
   versal_uart_intr_disable(regs, versal_uart_intr_all());
 }
 
+#ifdef VERSAL_CONSOLE_USE_INTERRUPTS
 static bool versal_uart_flags_clear(volatile versal_uart *regs, uint32_t flags)
 {
   return (regs->uartfr & flags) == 0;



More information about the vc mailing list