[Bug 2003] Instruction cache problem in gen5200 bsps

bugzilla-daemon at rtems.org bugzilla-daemon at rtems.org
Wed Feb 1 14:10:25 UTC 2012


Joel Sherrill <joel.sherrill at oarcorp.com> changed:

           What    |Removed                     |Added
                 CC|                            |joel.sherrill at oarcorp.com

--- Comment #3 from Joel Sherrill <joel.sherrill at oarcorp.com> 2012-02-01 08:10:25 CST ---
This will need to be applied to the 4.10 branch and added to the list of PRs
addressed in 4.10.3. 


These boards must be very fast or heavily under-utilized in their applications.
A couple of years ago, I spotted that we were getting double interrupts. Now
you say instruction caching isn't really on.

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