[RTEMS Project] #3433: Add SMP support for RISC-V

[RTEMS trac]

#3433: Add SMP support for RISC-V
-----------------------------+-------------------------------
 Reporter:  Sebastian Huber  |       Owner:  Sebastian Huber
     Type:  project          |      Status:  accepted
 Priority:  normal           |   Milestone:  6.1
Component:  arch/riscv       |     Version:
 Severity:  normal           |  Resolution:
 Keywords:                   |  Blocked By:  3452, 3453, 3459
 Blocking:                   |
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Comment (by Sebastian Huber <sebastian.huber@…>):

 In [changeset:"8db3f0e878b7f008ad05716f501220509662e2c4/rtems"
 8db3f0e/rtems]:
 {{{
 #!CommitTicketReference repository="rtems"
 revision="8db3f0e878b7f008ad05716f501220509662e2c4"
 riscv: Rework exception handling

 Remove _CPU_ISR_install_raw_handler() and _CPU_ISR_install_vector()
 functions.  Applications can install an exception handler via the fatal
 error handler to handle synchronous exceptions.

 Handle interrupt exceptions via _RISCV_Interrupt_dispatch() which must
 be provided by the BSP.

 Update #3433.
 }}}

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Ticket URL: <http://devel.rtems.org/ticket/3433#comment:58>
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