[RTEMS Project] #3785: Add RISC-V BSP with support for the Freedom E310 Arty A7 FPGA

[Joel Sherrill]

On Fri, Aug 16, 2019 at 8:38 AM RTEMS trac <trac at rtems.org> wrote:
>
> #3785: Add RISC-V BSP with support for the Freedom E310 Arty A7 FPGA
> -------------------------------------------+---------------------
>  Reporter:  pragnesh                       |       Owner:  (none)
>      Type:  task                           |      Status:  new
>  Priority:  normal                         |   Milestone:  5.1
> Component:  arch/riscv                     |     Version:  5
>  Severity:  normal                         |  Resolution:
>  Keywords:  #RISCV, #FREEDOME310, #ARTYA7  |  Blocked By:
>  Blocking:                                 |
> -------------------------------------------+---------------------
>
> Comment (by pragnesh):
>
>  1) Are you planning to submit a BSP variant for this or are you asking for
>  one?
>
>     I have already sent a patch for this new BSP varient (Freedom E310) to
>     devel at rtems.org, I created this ticket so that i can give reference in
>  the commit
>     message. i followed this
>  https://devel.rtems.org/wiki/Developer/Contributing
>
>     Let me know, Is this a right procedure to submit a patch?

You have done everything right. The ticket was just light on text.
Obviously I had missed
the email with the patch with the BSP.

>
>  2) Either way please link to the hardware, manuals, etc.
>
>     I will update the same in description

Think in terms of us generating release notes from tickets. Write enough
where you would realize what happened in the description. Include a
link to the board in the description.

I just had no idea there was really code with it. :)

Glad to see this.

--joel
>
> --
> Ticket URL: <http://devel.rtems.org/ticket/3785#comment:2>
> RTEMS Project <http://www.rtems.org/>
> RTEMS Project