[RTEMS Project] #3785: Add RISC-V BSP with support for the Freedom E310 Arty A7 FPGA

[RTEMS trac]

#3785: Add RISC-V BSP with support for the Freedom E310 Arty A7 FPGA
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 Reporter:  pragnesh                       |       Owner:  (none)
     Type:  task                           |      Status:  new
 Priority:  normal                         |   Milestone:  5.1
Component:  arch/riscv                     |     Version:  5
 Severity:  normal                         |  Resolution:
 Keywords:  #RISCV, #FREEDOME310, #ARTYA7  |  Blocked By:
 Blocking:                                 |
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Comment (by Sebastian Huber <sebastian.huber@…>):

 In [changeset:"5a1bc17970f1841f8956c3e2257639f4f0f03248/rtems"
 5a1bc179/rtems]:
 {{{
 #!CommitTicketReference repository="rtems"
 revision="5a1bc17970f1841f8956c3e2257639f4f0f03248"
 bsp/riscv: Remove bogus Automake conditional

 Update #3785.
 }}}

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Ticket URL: <http://devel.rtems.org/ticket/3785#comment:6>
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