[RTEMS Project] #3824: SMP for Ultrascale +

[RTEMS trac]

#3824: SMP for Ultrascale +
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 Reporter:  Massimiliano Patriarca  |       Owner:  (none)
     Type:  enhancement             |      Status:  new
 Priority:  normal                  |   Milestone:
Component:  admin                   |     Version:
 Severity:  normal                  |  Resolution:
 Keywords:                          |  Blocked By:
 Blocking:                          |
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Comment (by Sebastian Huber):

 In case both processors loop in this function, then this is probably a
 problem with the cache, MMU, or memory controller setup. Which state to
 the processor see and which state do they expect?

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Ticket URL: <http://devel.rtems.org/ticket/3824#comment:1>
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