[RTEMS Project] #3824: SMP for Ultrascale +

[RTEMS trac]

#3824: SMP for Ultrascale +
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 Reporter:  Massimiliano Patriarca  |       Owner:  (none)
     Type:  enhancement             |      Status:  new
 Priority:  normal                  |   Milestone:
Component:  admin                   |     Version:
 Severity:  normal                  |  Resolution:
 Keywords:                          |  Blocked By:
 Blocking:                          |
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Comment (by Massimiliano Patriarca):

 I must include some other infos.
 The system is initialized through the debugger (JTAG mode) , APU0 load the
 fsbl at aarch32, load the programmable logic and then is breaked @
 fsbl_loop().
 Then the debugger stores the following instruction into OCM: (AR# 46911)
 0xFFFFFF00: mvn r0, #15
 0xFFFFFF04: mov r1
 0xFFFFFF08: str r1, [r0]
 0xFFFFFF0C: wfe
 0xFFFFFF10: ldr r2, [r0]
 0xFFFFFF14: cmp r2, r1
 0xFFFFFF18: beq 0xc
 0xFFFFFF1C: mov pc

 then the debugger loads the smp examples to ram, and start both the
 processor.
 APU0 start the second processor and wait inside the function
 Per_CPU_State_wait for_non_initial_state().
 APU1 start executing the _start normally and the stalls into the function
 Per_CPU_State_wait for_non_initial_state().
 i can upload the lauterbach trace if necessary
 -M

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Ticket URL: <http://devel.rtems.org/ticket/3824#comment:2>
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