Documentation | Draft: Add Intel NIOS V BSP to RISC-V section of user's manual (!39)

[Kevin Kirspel (@kirspelk)]

Kevin Kirspel commented on a discussion on user/bsps/bsps-riscv.rst: https://gitlab.rtems.org/rtems/docs/rtems-docs/-/merge_requests/39#note_110896

 > +     The size of the On-Chip RAM connected to the NIOS V
 > +     (0 by default).
 > +
 > +``NIOSV_EXT_RAM_REGION_BEGIN``
 > +     The starting address of the external RAM connected to the NIOS V
 > +     (0xFFFFFFFF by default).
 > +
 > +``NIOSV_EXT_RAM_REGION_SIZE``
 > +     The size of the external RAM connected to the NIOS V
 > +     (0x00000000 by default).
 > +
 > +``NIOSV_IS_NIOSVG``
 > +     Whether or not the ``NIOS V/g`` processor is used
 > +     (false by default).
 > +
 > +``NIOSV_HAS_FP``

Yes, the NIOS_IS_NIOSVG and NIOS_HAS_FP flags select what ABI is used in the YML files since the developer may choose a V/m, V/g. or V/g with FPU.

-- 
View it on GitLab: https://gitlab.rtems.org/rtems/docs/rtems-docs/-/merge_requests/39#note_110896
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