RTEMS | aarch64: The FPSCR (FPSR/FPCR) and FPEXC registers do not have thread storage (#5214)
Preston Faiks (@pfaiks)
gitlab at rtems.org
Thu Feb 13 20:19:25 UTC 2025
Preston Faiks created an issue: https://gitlab.rtems.org/rtems/rtos/rtems/-/issues/5214
## Summary
This issue ([4027](https://gitlab.rtems.org/rtems/rtos/rtems/-/issues/4027)) also occurs on the aarch64 platform (Cortex A53).
The FPSR of one thread can corrupt the FPSR of another one.
## Steps to reproduce
Task A : Polling for floating point exceptions in the FPSR, with a delay (rtems_wake_after()) between each check.
Task B : Performs a floating point operation which causes an exception (divide by zero for example) also with a delay between operations.
--
View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/issues/5214
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