RTEMS | aarch64: The FPSCR (FPSR/FPCR) and FPEXC registers do not have thread storage (#5214)

Thu Feb 13 21:58:39 UTC 2025

Kinsey Moore commented: https://gitlab.rtems.org/rtems/rtos/rtems/-/issues/5214#note_119873

Given that both Joel and Chris agree with my interpretation of the AArch64 PCS, I'm closing this issue. I'd also like to note that the referenced issue was not resolved by adding the FPSCR to the ARM context switch and that the associated MR which might suggest that this was the case is in the "closed" state, not the "merged" state.

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View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/issues/5214#note_119873
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