RTEMS | RISC-V: Add support for ESP32-C3 (!1160)

Wed Apr 1 00:55:22 UTC 2026

Kinsey Moore commented on a discussion on bsps/riscv/shared/start/start.S: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1160#note_147704

 >  	.option	arch, +zicsr
 >  	.option	norelax
 >  
 > +#ifdef ESPRESSIF_DIRECT_BOOT
 > +	.word 0xaedb041d
 > +	.word 0xaedb041d

Done.

-- 
View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1160#note_147704
You're receiving this email because of your account on gitlab.rtems.org.

-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.rtems.org/pipermail/bugs/attachments/20260401/7a115660/attachment.htm>