RTEMS | RISC-V: Add support for ESP32-C3 (!1160)

[Kinsey Moore (@opticron)]

Kinsey Moore commented on a discussion on bsps/riscv/esp32/irq/irq_c3.c: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1160#note_147708

 > +  __asm__ volatile ("fence o, i" : : : "memory");
 > +  riscv_interrupt_enable(cookie);
 > +
 > +  /* clear all mappings */
 > +  for ( uint8_t vec = 1; vec < RISCV_MAXIMUM_EXTERNAL_INTERRUPTS; vec++ ) {
 > +    bsp_interrupt_vector_disable( vec );
 > +  }
 > +}
 > +
 > +bool bsp_interrupt_is_valid_vector(rtems_vector_number vector)
 > +{
 > +  if ( vector == 0 ) {
 > +    return false;
 > +  }
 > +
 > +  return vector < (rtems_vector_number) BSP_INTERRUPT_VECTOR_COUNT;

Done.

-- 
View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1160#note_147708
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