RTEMS | RISC-V: Add support for ESP32-C3 (!1160)

[Kinsey Moore (@opticron)]

Kinsey Moore pushed new commits to merge request !1160
Merge request URL: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1160


* 1453830e - riscv: Add support for Espressif Direct Boot
* b2de5875 - riscv: Add optional section copy callback
* 857adc6b - spec/bsps/riscv: Allow start section load address
* 63b71316 - spec/riscv: Allow BSS to be specified independent of DATA
* a1c2f91a - riscv: Add support for vectored interrupt controllers
* 55466151 - cpukit/riscv: Make use of MDT conditional on Zicsr
* ee085bae - riscv: Add basic ESP32-C3 BSP

-- 
View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1160
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