RTEMS | RISC-V: Add support for ESP32-C3 (!1160)

[Kinsey Moore (@opticron)]

Kinsey Moore pushed new commits to merge request !1160
Merge request URL: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1160


* 74d538f2 - riscv: Add support for Espressif Direct Boot
* 3b2ca267 - riscv: Add optional section copy callback
* 2b697fb3 - spec/bsps/riscv: Allow start section load address
* 519e563c - spec/riscv: Allow BSS to be specified independent of DATA
* 09ac67a2 - riscv: Add support for vectored interrupt controllers
* 16565838 - cpukit/riscv: Make use of MDT conditional on Zicsr
* da00742a - riscv: Add basic ESP32-C3 BSP

-- 
View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1160
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