RTEMS | RISC-V: add support for using the MMU in S-Mode (!1182)

[Kinsey Moore (@opticron)]

Kinsey Moore commented on a discussion on bsps/riscv/include/bsp/riscv-mmu.h: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1182#note_148025

 > + */
 > +void riscv_mmu_setup_translation_table(
 > +  riscv_mmu_control *control
 > +);
 > +
 > +void riscv_mmu_setup( void );
 > +
 > +BSP_START_TEXT_SECTION static inline void
 > +riscv_mmu_enable( const riscv_mmu_control *control )
 > +{
 > +  /* Enable MMU */
 > +  unsigned long value;
 > +#if __riscv_xlen == 64
 > +  value = (uint64_t) SPTBR_MODE_SV39 << 60;
 > +#else
 > +  value = (uint32_t) SPTBR_MODE_SV32 << 31;

Having the shifts integrated into the SV constants would be fine, too.

-- 
View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1182#note_148025
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