RTEMS | RISC-V: add support for using the MMU in S-Mode (!1182)
Kinsey Moore (@opticron)
gitlab at rtems.org
Sat Apr 4 02:25:21 UTC 2026
Kinsey Moore started a new discussion on bsps/riscv/include/bsp/riscv-mmu.h: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1182#note_148024
> + */
> +void riscv_mmu_setup_translation_table(
> + riscv_mmu_control *control
> +);
> +
> +void riscv_mmu_setup( void );
> +
> +BSP_START_TEXT_SECTION static inline void
> +riscv_mmu_enable( const riscv_mmu_control *control )
> +{
> + /* Enable MMU */
> + unsigned long value;
> +#if __riscv_xlen == 64
> + value = (uint64_t) SPTBR_MODE_SV39 << 60;
> +#else
> + value = (uint32_t) SPTBR_MODE_SV32 << 31;
60 and 31 here are correct, but they should really be SPTBR_MODE_SHIFT or something similar to avoid magic numbers.
--
View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1182#note_148024
You're receiving this email because of your account on gitlab.rtems.org.
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.rtems.org/pipermail/bugs/attachments/20260404/87208e1c/attachment-0001.htm>
More information about the bugs
mailing list