RTEMS | riscv: s-mode use SBI for timer, reset, and SMP support (!1108)
Gedare Bloom (@gedare)
gitlab at rtems.org
Wed Mar 11 22:39:57 UTC 2026
Gedare Bloom commented on a discussion on bsps/include/bsp/fatal.h: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1108#note_145063
> RISCV_FATAL_UNUSED_0,
> RISCV_FATAL_NO_NS16550_INTERRUPTS_IN_DEVICE_TREE,
> RISCV_FATAL_NO_TLCLOCK_FREQUENCY_IN_DEVICE_TREE,
> - RISCV_FATAL_CLOCK_SMP_INIT,
> + RISCV_FATAL_UNUSED_1,
If he doesn't chime in, I think we can make this an issue to see if we can/should remove both of the `RISCV_FATAL_UNUSED_x`
--
View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1108#note_145063
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