RTEMS | riscv: s-mode use SBI for timer, reset, and SMP support (!1108)

[Gedare Bloom (@gedare)]

Gedare Bloom commented on a discussion on bsps/include/bsp/fatal.h: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1108#note_144927

 >    RISCV_FATAL_UNUSED_0,
 >    RISCV_FATAL_NO_NS16550_INTERRUPTS_IN_DEVICE_TREE,
 >    RISCV_FATAL_NO_TLCLOCK_FREQUENCY_IN_DEVICE_TREE,
 > -  RISCV_FATAL_CLOCK_SMP_INIT,
 > +  RISCV_FATAL_UNUSED_1,

I followed the example of the removal / change to `RISCV_FATAL_UNUSED_0`. I'm not really sure if there is a hard requirement here. @sebhub?

-- 
View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1108#note_144927
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