RTEMS | riscv: s-mode use SBI for timer, reset, and SMP support (!1108)

[Joel Sherrill (@joel)]

Merge request !1108 was merged
Merge request URL: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1108
Project:Branches: gedare/rtems:riscv-sbi-smp to rtems/rtos/rtems:main
Author: Gedare Bloom
Assignee: Gedare Bloom

-- 
View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1108
You're receiving this email because of your account on gitlab.rtems.org.


-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.rtems.org/pipermail/bugs/attachments/20260318/eb9abb48/attachment-0001.htm>