RTEMS | RISC-V: Add support for ESP32-C3 (!1160)

[Gedare Bloom (@gedare)]

Gedare Bloom started a new discussion on bsps/riscv/esp32/include/c3/chip_definitions.h: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1160#note_147627

 > + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 > + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 > + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 > + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 > + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 > + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 > + * SUCH DAMAGE.
 > + */
 > +
 > +#ifndef LIBBSP_ESP32_C3_CHIP_DEFINITIONS_H
 > +#define LIBBSP_ESP32_C3_CHIP_DEFINITIONS_H
 > +
 > +#ifndef ASM
 > +
 > +#include <bsp.h>
 > +

I would only guard against including the `bsp.h`. The definitions should be valid in ASM?

-- 
View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1160#note_147627
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