RTEMS | RISC-V: Add support for ESP32-C3 (!1160)
Gedare Bloom (@gedare)
gitlab at rtems.org
Tue Mar 31 16:24:19 UTC 2026
Gedare Bloom started a new discussion on bsps/riscv/esp32/irq/irq_c3.c: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1160#note_147629
> + size_t map_count = RTEMS_ARRAY_SIZE( irq_mappings );
> +
> + for ( size_t i = 0; i < map_count; i++ ) {
> + if ( irq_mappings[i].peripheral_int == vector ) {
> + return irq_mappings[i].cpu_int;
> + }
> + }
> +
> + return 0;
> +}
> +
> +static rtems_vector_number get_active_interrupt( uint8_t cpu_vector )
> +{
> + uint64_t total_set = get_int_status();
> +
> + for ( uint32_t i = 0; i < sizeof( uint64_t ) * 8; i++ ) {
should it be `rtems_vector_number i` for better type?
--
View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1160#note_147629
You're receiving this email because of your account on gitlab.rtems.org.
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.rtems.org/pipermail/bugs/attachments/20260331/a7dec309/attachment-0001.htm>
More information about the bugs
mailing list