RTEMS | RISC-V: Add support for ESP32-C3 (!1160)

[Kinsey Moore (@opticron)]

Kinsey Moore commented on a discussion on bsps/riscv/esp32/irq/irq_c3.c: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1160#note_147697

 > +
 > +  rtems_vector_number active;
 > +  uint8_t cpu_vector = mcause & 0x1f;
 > +
 > +  /*
 > +   * All interrupts on the ESP32-C3 are external except for exceptions which
 > +   * are handled elsewhere
 > +   */
 > +
 > +  /* Check this CPU vector to see which peripheral has an active interrupt */
 > +  active = get_active_interrupt( cpu_vector );
 > +
 > +  bsp_interrupt_assert( bsp_interrupt_is_valid_vector( active ) );
 > +
 > +  /*
 > +   * TODO Interrupt nesting is not yet supported?

I did actually verify that this works, but forgot to remove this comment once I had verified it. I'll remove it.

-- 
View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1160#note_147697
You're receiving this email because of your account on gitlab.rtems.org.


-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.rtems.org/pipermail/bugs/attachments/20260331/39f25c64/attachment-0001.htm>