RTEMS | RISC-V: Add support for ESP32-C3 (!1160)
Gedare Bloom (@gedare)
gitlab at rtems.org
Tue Mar 31 16:26:26 UTC 2026
Gedare Bloom started a new discussion on bsps/riscv/esp32/irq/irq_c3.c: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1160#note_147630
> +
> + rtems_vector_number active;
> + uint8_t cpu_vector = mcause & 0x1f;
> +
> + /*
> + * All interrupts on the ESP32-C3 are external except for exceptions which
> + * are handled elsewhere
> + */
> +
> + /* Check this CPU vector to see which peripheral has an active interrupt */
> + active = get_active_interrupt( cpu_vector );
> +
> + bsp_interrupt_assert( bsp_interrupt_is_valid_vector( active ) );
> +
> + /*
> + * TODO Interrupt nesting is not yet supported?
create an issue?
--
View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1160#note_147630
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