[PATCH] score: Add CPU_Exception_frame
Sebastian Huber
sebastian.huber at embedded-brains.de
Sun Nov 25 16:48:11 UTC 2012
Add CPU port type CPU_Exception_frame and function
_CPU_Exception_frame_print().
The CPU ports of avr, bfin, h8300, lm32, m32c, m32r, m68k, nios2, sh,
sparc64, and v850 use an empty default implementation of
_CPU_Exception_frame_print().
Add rtems_exception_frame and rtems_exception_frame_print().
Add RTEMS_FATAL_SOURCE_EXCEPTION for CPU exceptions. Use rtems_fatal()
with source RTEMS_FATAL_SOURCE_EXCEPTION in CPU ports of i386, powerpc,
and sparc for unexpected exceptions.
The powerpc port uses now a unified CPU_Exception_frame. This resulted
in a CPU_Exception_frame layout change for the MPC5XX.
Add third parameter to RTEMS_BSP_CLEANUP_OPTIONS() which controls the
BSP_PRINT_EXCEPTION_CONTEXT define used in the default
bsp_fatal_extension().
Add test sptests/spfatal26.
---
c/src/aclocal/bsp-bspcleanup-options.m4 | 7 +-
.../lib/libbsp/mips/shared/irq/vectorexceptions.c | 6 +-
c/src/lib/libbsp/powerpc/psim/configure.ac | 2 +-
c/src/lib/libbsp/shared/bspclean.c | 8 +-
c/src/lib/libbsp/sparc/erc32/configure.ac | 2 +-
c/src/lib/libbsp/sparc/erc32/startup/spurious.c | 37 +++---
c/src/lib/libbsp/sparc/leon2/startup/spurious.c | 37 +++---
c/src/lib/libbsp/sparc/leon3/startup/spurious.c | 38 ++++---
c/src/lib/libcpu/powerpc/Makefile.am | 3 +-
c/src/lib/libcpu/powerpc/mpc5xx/vectors/vectors.h | 120 +++++++-------------
.../bspsupport/ppc_exc_global_handler.c | 2 +-
.../new-exceptions/bspsupport/ppc_exc_initialize.c | 55 +++++++++
.../new-exceptions/bspsupport/ppc_exc_print.c | 2 +-
.../powerpc/new-exceptions/bspsupport/vectors.h | 51 +--------
cpukit/sapi/include/rtems/fatal.h | 17 +++
cpukit/score/cpu/arm/Makefile.am | 2 +
cpukit/score/cpu/arm/arm-exception-frame-print.c | 28 +++++
.../score/cpu/arm/armv7m-exception-frame-print.c | 28 +++++
cpukit/score/cpu/arm/rtems/score/cpu.h | 5 +
cpukit/score/cpu/avr/Makefile.am | 1 +
cpukit/score/cpu/avr/avr-exception-frame-print.c | 24 ++++
cpukit/score/cpu/avr/rtems/score/cpu.h | 5 +
cpukit/score/cpu/bfin/Makefile.am | 1 +
cpukit/score/cpu/bfin/bfin-exception-frame-print.c | 24 ++++
cpukit/score/cpu/bfin/rtems/score/cpu.h | 5 +
cpukit/score/cpu/h8300/Makefile.am | 1 +
.../score/cpu/h8300/h8300-exception-frame-print.c | 24 ++++
cpukit/score/cpu/h8300/rtems/score/cpu.h | 5 +
cpukit/score/cpu/i386/cpu.c | 12 +-
cpukit/score/cpu/i386/rtems/score/cpu.h | 2 +
cpukit/score/cpu/lm32/Makefile.am | 1 +
cpukit/score/cpu/lm32/lm32-exception-frame-print.c | 24 ++++
cpukit/score/cpu/lm32/rtems/score/cpu.h | 5 +
cpukit/score/cpu/m32c/Makefile.am | 1 +
cpukit/score/cpu/m32c/m32c-exception-frame-print.c | 24 ++++
cpukit/score/cpu/m32c/rtems/score/cpu.h | 5 +
cpukit/score/cpu/m32r/Makefile.am | 1 +
cpukit/score/cpu/m32r/m32r-exception-frame-print.c | 24 ++++
cpukit/score/cpu/m32r/rtems/score/cpu.h | 5 +
cpukit/score/cpu/m68k/Makefile.am | 1 +
cpukit/score/cpu/m68k/m68k-exception-frame-print.c | 24 ++++
cpukit/score/cpu/m68k/rtems/score/cpu.h | 2 +
cpukit/score/cpu/mips/rtems/score/cpu.h | 13 +++
cpukit/score/cpu/nios2/Makefile.am | 1 +
.../score/cpu/nios2/nios2-exception-frame-print.c | 24 ++++
cpukit/score/cpu/nios2/rtems/score/cpu.h | 2 +
cpukit/score/cpu/no_cpu/rtems/score/cpu.h | 13 +++
cpukit/score/cpu/powerpc/rtems/score/cpu.h | 57 ++++++++++
cpukit/score/cpu/sh/Makefile.am | 1 +
cpukit/score/cpu/sh/rtems/score/cpu.h | 4 +
cpukit/score/cpu/sh/sh-exception-frame-print.c | 24 ++++
cpukit/score/cpu/sparc/rtems/score/cpu.h | 14 +++
cpukit/score/cpu/sparc64/Makefile.am | 1 +
cpukit/score/cpu/sparc64/rtems/score/cpu.h | 5 +
.../cpu/sparc64/sparc64-exception-frame-print.c | 24 ++++
cpukit/score/cpu/v850/Makefile.am | 1 +
cpukit/score/cpu/v850/rtems/score/cpu.h | 5 +
cpukit/score/cpu/v850/v850-exception-frame-print.c | 24 ++++
cpukit/score/include/rtems/score/interr.h | 6 +-
doc/user/fatal.t | 27 +++++
testsuites/sptests/Makefile.am | 1 +
testsuites/sptests/configure.ac | 1 +
testsuites/sptests/spfatal26/Makefile.am | 19 ++++
testsuites/sptests/spfatal26/init.c | 85 ++++++++++++++
testsuites/sptests/spfatal26/spfatal26.doc | 11 ++
testsuites/sptests/spfatal26/spfatal26.scn | 2 +
66 files changed, 838 insertions(+), 198 deletions(-)
create mode 100644 cpukit/score/cpu/arm/arm-exception-frame-print.c
create mode 100644 cpukit/score/cpu/arm/armv7m-exception-frame-print.c
create mode 100644 cpukit/score/cpu/avr/avr-exception-frame-print.c
create mode 100644 cpukit/score/cpu/bfin/bfin-exception-frame-print.c
create mode 100644 cpukit/score/cpu/h8300/h8300-exception-frame-print.c
create mode 100644 cpukit/score/cpu/lm32/lm32-exception-frame-print.c
create mode 100644 cpukit/score/cpu/m32c/m32c-exception-frame-print.c
create mode 100644 cpukit/score/cpu/m32r/m32r-exception-frame-print.c
create mode 100644 cpukit/score/cpu/m68k/m68k-exception-frame-print.c
create mode 100644 cpukit/score/cpu/nios2/nios2-exception-frame-print.c
create mode 100644 cpukit/score/cpu/sh/sh-exception-frame-print.c
create mode 100644 cpukit/score/cpu/sparc64/sparc64-exception-frame-print.c
create mode 100644 cpukit/score/cpu/v850/v850-exception-frame-print.c
create mode 100644 testsuites/sptests/spfatal26/Makefile.am
create mode 100644 testsuites/sptests/spfatal26/init.c
create mode 100644 testsuites/sptests/spfatal26/spfatal26.doc
create mode 100644 testsuites/sptests/spfatal26/spfatal26.scn
diff --git a/c/src/aclocal/bsp-bspcleanup-options.m4 b/c/src/aclocal/bsp-bspcleanup-options.m4
index cac8d55..00bc0fb 100644
--- a/c/src/aclocal/bsp-bspcleanup-options.m4
+++ b/c/src/aclocal/bsp-bspcleanup-options.m4
@@ -9,10 +9,11 @@ dnl
dnl To be used in bsp-configure scripts
dnl USAGE:
-dnl RTEMS_BSP_CLEANUP_OPTIONS([0|1], [0|1])
+dnl RTEMS_BSP_CLEANUP_OPTIONS([0|1], [0|1], [0|1])
dnl WHERE:
dnl argument 1 indicates the default value for BSP_PRESS_KEY_FOR_RESET
dnl argument 2 indicates the default value for BSP_RESET_BOARD_AT_EXIT
+dnl argument 3 indicates the default value for BSP_PRINT_EXCEPTION_CONTEXT
AC_DEFUN([RTEMS_BSP_CLEANUP_OPTIONS],[
RTEMS_BSPOPTS_SET([BSP_PRESS_KEY_FOR_RESET],[*],[$1])
@@ -23,4 +24,8 @@ RTEMS_BSPOPTS_HELP([BSP_PRESS_KEY_FOR_RESET],
RTEMS_BSPOPTS_SET([BSP_RESET_BOARD_AT_EXIT],[*],[$2])
RTEMS_BSPOPTS_HELP([BSP_RESET_BOARD_AT_EXIT],
[If defined, reset the board when the application exits.])
+
+RTEMS_BSPOPTS_SET([BSP_PRINT_EXCEPTION_CONTEXT],[*],[$3])
+RTEMS_BSPOPTS_HELP([BSP_PRINT_EXCEPTION_CONTEXT],
+[If defined, prints the exception context when an unexpected exception occurs.])
])
diff --git a/c/src/lib/libbsp/mips/shared/irq/vectorexceptions.c b/c/src/lib/libbsp/mips/shared/irq/vectorexceptions.c
index 91ecf33..e0e175c 100644
--- a/c/src/lib/libbsp/mips/shared/irq/vectorexceptions.c
+++ b/c/src/lib/libbsp/mips/shared/irq/vectorexceptions.c
@@ -24,9 +24,7 @@
#include <rtems/bspIo.h>
#include <bsp/irq-generic.h>
-void mips_vector_exceptions( CPU_Interrupt_frame *frame );
-
-static const char *cause_strings[32] =
+static const char *const cause_strings[32] =
{
/* 0 */ "Int",
/* 1 */ "TLB Mods",
@@ -79,7 +77,7 @@ static const struct regdef dumpregs[]= {
{ R_EPC,"R_EPC"}, { -1, NULL }
};
-static void mips_dump_exception_frame( CPU_Interrupt_frame *frame )
+void _BSP_Exception_frame_print( const CPU_Exception_frame *frame )
{
uint32_t *frame_u32;
int i, j;
diff --git a/c/src/lib/libbsp/powerpc/psim/configure.ac b/c/src/lib/libbsp/powerpc/psim/configure.ac
index c21b7ec..4d6c453 100644
--- a/c/src/lib/libbsp/powerpc/psim/configure.ac
+++ b/c/src/lib/libbsp/powerpc/psim/configure.ac
@@ -45,7 +45,7 @@ Note that the policy can still be defined by the application
CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK this feature is removed
and a little memory is saved.])
-RTEMS_BSP_CLEANUP_OPTIONS(0, 1)
+RTEMS_BSP_CLEANUP_OPTIONS(0, 1, 1)
# Explicitly list all Makefiles here
AC_CONFIG_FILES([Makefile])
diff --git a/c/src/lib/libbsp/shared/bspclean.c b/c/src/lib/libbsp/shared/bspclean.c
index 1d6f08a..3e48c29 100644
--- a/c/src/lib/libbsp/shared/bspclean.c
+++ b/c/src/lib/libbsp/shared/bspclean.c
@@ -16,7 +16,7 @@
void bsp_fatal_extension(
rtems_fatal_source source,
bool is_internal,
- rtems_fatal_code error
+ rtems_fatal_code code
)
{
#if (BSP_PRESS_KEY_FOR_RESET)
@@ -31,6 +31,12 @@ void bsp_fatal_extension(
printk("\n");
#endif
+ #if (BSP_PRINT_EXCEPTION_CONTEXT)
+ if ( source == RTEMS_FATAL_SOURCE_EXCEPTION ) {
+ rtems_exception_frame_print( (const rtems_exception_frame *) code );
+ }
+ #endif
+
/*
* Check both conditions -- if you want to ask for reboot, then
* you must have meant to reset the board.
diff --git a/c/src/lib/libbsp/sparc/erc32/configure.ac b/c/src/lib/libbsp/sparc/erc32/configure.ac
index 5f1317c..8155514 100644
--- a/c/src/lib/libbsp/sparc/erc32/configure.ac
+++ b/c/src/lib/libbsp/sparc/erc32/configure.ac
@@ -42,7 +42,7 @@ RTEMS_BSPOPTS_HELP([ENABLE_SIS_QUIRKS],
BSP will be enabled. In particular, SIS requires special
initialization not used on real ERC32 hardware.])
-RTEMS_BSP_CLEANUP_OPTIONS(0,1)
+RTEMS_BSP_CLEANUP_OPTIONS(0,1,1)
# Explicitly list all Makefiles here
AC_CONFIG_FILES([Makefile])
diff --git a/c/src/lib/libbsp/sparc/erc32/startup/spurious.c b/c/src/lib/libbsp/sparc/erc32/startup/spurious.c
index bbf6cca..b74f0c7 100644
--- a/c/src/lib/libbsp/sparc/erc32/startup/spurious.c
+++ b/c/src/lib/libbsp/sparc/erc32/startup/spurious.c
@@ -16,20 +16,15 @@
#include <bsp.h>
#include <rtems/bspIo.h>
-/*
- * bsp_spurious_handler
- *
- * Print a message on the debug console and then die
- */
-
-rtems_isr bsp_spurious_handler(
- rtems_vector_number trap,
- CPU_Interrupt_frame *isf
-)
+void _BSP_Exception_frame_print( const CPU_Exception_frame *frame )
{
- uint32_t real_trap;
+ uint32_t trap;
+ uint32_t real_trap;
+ const CPU_Interrupt_frame *isf;
+ trap = frame->trap;
real_trap = SPARC_REAL_TRAP_NUMBER(trap);
+ isf = frame->isf;
printk( "Unexpected trap (%2d) at address 0x%08x\n", real_trap, isf->tpc);
@@ -121,12 +116,22 @@ rtems_isr bsp_spurious_handler(
default:
break;
}
+}
- /*
- * What else can we do but stop ...
- */
-
- __asm__ volatile( "mov 1, %g1; ta 0x0" );
+rtems_isr bsp_spurious_handler(
+ rtems_vector_number trap,
+ CPU_Interrupt_frame *isf
+)
+{
+ CPU_Exception_frame frame = {
+ .trap = trap,
+ .isf = isf
+ };
+
+ rtems_fatal(
+ RTEMS_FATAL_SOURCE_EXCEPTION,
+ (rtems_fatal_code) &frame
+ );
}
/*
diff --git a/c/src/lib/libbsp/sparc/leon2/startup/spurious.c b/c/src/lib/libbsp/sparc/leon2/startup/spurious.c
index c4bdf79..c0500c7 100644
--- a/c/src/lib/libbsp/sparc/leon2/startup/spurious.c
+++ b/c/src/lib/libbsp/sparc/leon2/startup/spurious.c
@@ -16,20 +16,15 @@
#include <bsp.h>
#include <rtems/bspIo.h>
-/*
- * bsp_spurious_handler
- *
- * Print a message on the debug console and then die
- */
-
-rtems_isr bsp_spurious_handler(
- rtems_vector_number trap,
- CPU_Interrupt_frame *isf
-)
+void _BSP_Exception_frame_print( const CPU_Exception_frame *frame )
{
- uint32_t real_trap;
+ uint32_t trap;
+ uint32_t real_trap;
+ const CPU_Interrupt_frame *isf;
+ trap = frame->trap;
real_trap = SPARC_REAL_TRAP_NUMBER(trap);
+ isf = frame->isf;
printk( "Unexpected trap (%2d) at address 0x%08x\n", real_trap, isf->tpc);
@@ -102,12 +97,22 @@ rtems_isr bsp_spurious_handler(
default:
break;
}
+}
- /*
- * What else can we do but stop ...
- */
-
- __asm__ volatile( "mov 1, %g1; ta 0x0" );
+rtems_isr bsp_spurious_handler(
+ rtems_vector_number trap,
+ CPU_Interrupt_frame *isf
+)
+{
+ CPU_Exception_frame frame = {
+ .trap = trap,
+ .isf = isf
+ };
+
+ rtems_fatal(
+ RTEMS_FATAL_SOURCE_EXCEPTION,
+ (rtems_fatal_code) &frame
+ );
}
/*
diff --git a/c/src/lib/libbsp/sparc/leon3/startup/spurious.c b/c/src/lib/libbsp/sparc/leon3/startup/spurious.c
index f060e28..e12ac01 100644
--- a/c/src/lib/libbsp/sparc/leon3/startup/spurious.c
+++ b/c/src/lib/libbsp/sparc/leon3/startup/spurious.c
@@ -18,23 +18,17 @@
*/
#include <bsp.h>
-
#include <rtems/bspIo.h>
-/*
- * bsp_spurious_handler
- *
- * Print a message on the debug console and then die
- */
-
-rtems_isr bsp_spurious_handler(
- rtems_vector_number trap,
- CPU_Interrupt_frame *isf
-)
+void _BSP_Exception_frame_print( const CPU_Exception_frame *frame )
{
- uint32_t real_trap;
+ uint32_t trap;
+ uint32_t real_trap;
+ const CPU_Interrupt_frame *isf;
+ trap = frame->trap;
real_trap = SPARC_REAL_TRAP_NUMBER(trap);
+ isf = frame->isf;
printk( "Unexpected trap (0x%02x) at address 0x%08x\n", real_trap, isf->tpc);
@@ -113,12 +107,22 @@ rtems_isr bsp_spurious_handler(
default:
break;
}
+}
- /*
- * What else can we do but stop ...
- */
-
- __asm__ volatile( "mov 1, %g1; ta 0x0" );
+rtems_isr bsp_spurious_handler(
+ rtems_vector_number trap,
+ CPU_Interrupt_frame *isf
+)
+{
+ CPU_Exception_frame frame = {
+ .trap = trap,
+ .isf = isf
+ };
+
+ rtems_fatal(
+ RTEMS_FATAL_SOURCE_EXCEPTION,
+ (rtems_fatal_code) &frame
+ );
}
/*
diff --git a/c/src/lib/libcpu/powerpc/Makefile.am b/c/src/lib/libcpu/powerpc/Makefile.am
index 4401b5f..febcc6b 100644
--- a/c/src/lib/libcpu/powerpc/Makefile.am
+++ b/c/src/lib/libcpu/powerpc/Makefile.am
@@ -188,7 +188,8 @@ mpc5xx_timer_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
include_libcpu_HEADERS += mpc5xx/vectors/vectors.h
noinst_PROGRAMS += mpc5xx/vectors.rel
-mpc5xx_vectors_rel_SOURCES = mpc5xx/vectors/vectors_init.c mpc5xx/vectors/vectors.S
+mpc5xx_vectors_rel_SOURCES = mpc5xx/vectors/vectors_init.c mpc5xx/vectors/vectors.S \
+ new-exceptions/bspsupport/ppc_exc_print.c
mpc5xx_vectors_rel_CPPFLAGS = $(AM_CPPFLAGS)
mpc5xx_vectors_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
endif
diff --git a/c/src/lib/libcpu/powerpc/mpc5xx/vectors/vectors.h b/c/src/lib/libcpu/powerpc/mpc5xx/vectors/vectors.h
index 217c41d..c88e296 100644
--- a/c/src/lib/libcpu/powerpc/mpc5xx/vectors/vectors.h
+++ b/c/src/lib/libcpu/powerpc/mpc5xx/vectors/vectors.h
@@ -34,43 +34,44 @@
#define SRR0_FRAME_OFFSET 8
#define SRR1_FRAME_OFFSET 12
#define EXCEPTION_NUMBER_OFFSET 16
-#define GPR0_OFFSET 20
-#define GPR1_OFFSET 24
-#define GPR2_OFFSET 28
-#define GPR3_OFFSET 32
-#define GPR4_OFFSET 36
-#define GPR5_OFFSET 40
-#define GPR6_OFFSET 44
-#define GPR7_OFFSET 48
-#define GPR8_OFFSET 52
-#define GPR9_OFFSET 56
-#define GPR10_OFFSET 60
-#define GPR11_OFFSET 64
-#define GPR12_OFFSET 68
-#define GPR13_OFFSET 72
-#define GPR14_OFFSET 76
-#define GPR15_OFFSET 80
-#define GPR16_OFFSET 84
-#define GPR17_OFFSET 88
-#define GPR18_OFFSET 92
-#define GPR19_OFFSET 96
-#define GPR20_OFFSET 100
-#define GPR21_OFFSET 104
-#define GPR22_OFFSET 108
-#define GPR23_OFFSET 112
-#define GPR24_OFFSET 116
-#define GPR25_OFFSET 120
-#define GPR26_OFFSET 124
-#define GPR27_OFFSET 128
-#define GPR28_OFFSET 132
-#define GPR29_OFFSET 136
-#define GPR30_OFFSET 140
-#define GPR31_OFFSET 144
-#define EXC_CR_OFFSET 148
-#define EXC_CTR_OFFSET 152
-#define EXC_XER_OFFSET 156
-#define EXC_LR_OFFSET 160
-#define EXC_DAR_OFFSET 164
+#define EXC_CR_OFFSET 20
+#define EXC_CTR_OFFSET 24
+#define EXC_XER_OFFSET 28
+#define EXC_LR_OFFSET 32
+#define GPR0_OFFSET 36
+#define GPR1_OFFSET 40
+#define GPR2_OFFSET 44
+#define GPR3_OFFSET 48
+#define GPR4_OFFSET 52
+#define GPR5_OFFSET 56
+#define GPR6_OFFSET 60
+#define GPR7_OFFSET 64
+#define GPR8_OFFSET 68
+#define GPR9_OFFSET 72
+#define GPR10_OFFSET 76
+#define GPR11_OFFSET 80
+#define GPR12_OFFSET 84
+#define GPR13_OFFSET 88
+#define GPR14_OFFSET 92
+#define GPR15_OFFSET 96
+#define GPR16_OFFSET 100
+#define GPR17_OFFSET 104
+#define GPR18_OFFSET 108
+#define GPR19_OFFSET 112
+#define GPR20_OFFSET 116
+#define GPR21_OFFSET 120
+#define GPR22_OFFSET 124
+#define GPR23_OFFSET 128
+#define GPR24_OFFSET 132
+#define GPR25_OFFSET 136
+#define GPR26_OFFSET 140
+#define GPR27_OFFSET 144
+#define GPR28_OFFSET 148
+#define GPR29_OFFSET 152
+#define GPR30_OFFSET 156
+#define GPR31_OFFSET 160
+#define EXC_MSR_OFFSET 164
+#define EXC_DAR_OFFSET 168
/*
* maintain the EABI requested 8 bytes aligment
* As SVR4 ABI requires 16, make it 16 (as some
@@ -87,51 +88,6 @@ extern void default_exception_vector_code_prolog();
extern int default_exception_vector_code_prolog_size;
extern void initialize_exceptions();
-typedef struct {
- unsigned EXC_SRR0;
- unsigned EXC_SRR1;
- unsigned _EXC_number;
- unsigned GPR0;
- unsigned GPR1;
- unsigned GPR2;
- unsigned GPR3;
- unsigned GPR4;
- unsigned GPR5;
- unsigned GPR6;
- unsigned GPR7;
- unsigned GPR8;
- unsigned GPR9;
- unsigned GPR10;
- unsigned GPR11;
- unsigned GPR12;
- unsigned GPR13;
- unsigned GPR14;
- unsigned GPR15;
- unsigned GPR16;
- unsigned GPR17;
- unsigned GPR18;
- unsigned GPR19;
- unsigned GPR20;
- unsigned GPR21;
- unsigned GPR22;
- unsigned GPR23;
- unsigned GPR24;
- unsigned GPR25;
- unsigned GPR26;
- unsigned GPR27;
- unsigned GPR28;
- unsigned GPR29;
- unsigned GPR30;
- unsigned GPR31;
- unsigned EXC_CR;
- unsigned EXC_CTR;
- unsigned EXC_XER;
- unsigned EXC_LR;
- unsigned EXC_MSR;
- unsigned EXC_DAR;
-}CPU_Exception_frame;
-
-
typedef void rtems_exception_handler_t (CPU_Exception_frame* excPtr);
/*DEBUG typedef rtems_exception_handler_t cpuExcHandlerType; */
diff --git a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_global_handler.c b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_global_handler.c
index 255e401..008611c 100644
--- a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_global_handler.c
+++ b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_global_handler.c
@@ -24,7 +24,7 @@ exception_handler_t globalExceptHdl = C_exception_handler;
void C_exception_handler(BSP_Exception_frame *excPtr)
{
rtems_fatal(
- RTEMS_FATAL_SOURCE_POWERPC_EXCEPTION,
+ RTEMS_FATAL_SOURCE_EXCEPTION,
(rtems_fatal_code) excPtr
);
}
diff --git a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_initialize.c b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_initialize.c
index d9bb872..121a4c1 100644
--- a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_initialize.c
+++ b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_initialize.c
@@ -27,6 +27,61 @@
#include <bsp/vectors.h>
#include <bsp/bootcard.h>
+#define PPC_EXC_ASSERT_OFFSET(field, off) \
+ RTEMS_STATIC_ASSERT( \
+ offsetof(CPU_Exception_frame, field) + 8 == off, \
+ CPU_Exception_frame_offset_ ## field \
+ )
+
+#define PPC_EXC_ASSERT_CANONIC_OFFSET(field) \
+ PPC_EXC_ASSERT_OFFSET(field, field ## _OFFSET)
+
+PPC_EXC_ASSERT_OFFSET(EXC_SRR0, SRR0_FRAME_OFFSET);
+PPC_EXC_ASSERT_OFFSET(EXC_SRR1, SRR1_FRAME_OFFSET);
+PPC_EXC_ASSERT_OFFSET(_EXC_number, EXCEPTION_NUMBER_OFFSET);
+PPC_EXC_ASSERT_CANONIC_OFFSET(EXC_CR);
+PPC_EXC_ASSERT_CANONIC_OFFSET(EXC_CTR);
+PPC_EXC_ASSERT_CANONIC_OFFSET(EXC_XER);
+PPC_EXC_ASSERT_CANONIC_OFFSET(EXC_LR);
+#ifdef __SPE__
+ PPC_EXC_ASSERT_OFFSET(EXC_SPEFSCR, PPC_EXC_SPEFSCR);
+ PPC_EXC_ASSERT_OFFSET(EXC_ACC, PPC_EXC_ACC);
+#endif
+PPC_EXC_ASSERT_CANONIC_OFFSET(GPR0);
+PPC_EXC_ASSERT_CANONIC_OFFSET(GPR1);
+PPC_EXC_ASSERT_CANONIC_OFFSET(GPR2);
+PPC_EXC_ASSERT_CANONIC_OFFSET(GPR3);
+PPC_EXC_ASSERT_CANONIC_OFFSET(GPR4);
+PPC_EXC_ASSERT_CANONIC_OFFSET(GPR5);
+PPC_EXC_ASSERT_CANONIC_OFFSET(GPR6);
+PPC_EXC_ASSERT_CANONIC_OFFSET(GPR7);
+PPC_EXC_ASSERT_CANONIC_OFFSET(GPR8);
+PPC_EXC_ASSERT_CANONIC_OFFSET(GPR9);
+PPC_EXC_ASSERT_CANONIC_OFFSET(GPR10);
+PPC_EXC_ASSERT_CANONIC_OFFSET(GPR11);
+PPC_EXC_ASSERT_CANONIC_OFFSET(GPR12);
+PPC_EXC_ASSERT_CANONIC_OFFSET(GPR13);
+PPC_EXC_ASSERT_CANONIC_OFFSET(GPR14);
+PPC_EXC_ASSERT_CANONIC_OFFSET(GPR15);
+PPC_EXC_ASSERT_CANONIC_OFFSET(GPR16);
+PPC_EXC_ASSERT_CANONIC_OFFSET(GPR17);
+PPC_EXC_ASSERT_CANONIC_OFFSET(GPR18);
+PPC_EXC_ASSERT_CANONIC_OFFSET(GPR19);
+PPC_EXC_ASSERT_CANONIC_OFFSET(GPR20);
+PPC_EXC_ASSERT_CANONIC_OFFSET(GPR21);
+PPC_EXC_ASSERT_CANONIC_OFFSET(GPR22);
+PPC_EXC_ASSERT_CANONIC_OFFSET(GPR23);
+PPC_EXC_ASSERT_CANONIC_OFFSET(GPR24);
+PPC_EXC_ASSERT_CANONIC_OFFSET(GPR25);
+PPC_EXC_ASSERT_CANONIC_OFFSET(GPR26);
+PPC_EXC_ASSERT_CANONIC_OFFSET(GPR27);
+PPC_EXC_ASSERT_CANONIC_OFFSET(GPR28);
+PPC_EXC_ASSERT_CANONIC_OFFSET(GPR29);
+PPC_EXC_ASSERT_CANONIC_OFFSET(GPR30);
+PPC_EXC_ASSERT_CANONIC_OFFSET(GPR31);
+PPC_EXC_ASSERT_CANONIC_OFFSET(EXC_MSR);
+PPC_EXC_ASSERT_CANONIC_OFFSET(EXC_DAR);
+
uint32_t ppc_exc_cache_wb_check = 1;
#define MTIVPR(prefix) __asm__ volatile ("mtivpr %0" : : "r" (prefix))
diff --git a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_print.c b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_print.c
index e1bbf12..34233ba 100644
--- a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_print.c
+++ b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_print.c
@@ -85,7 +85,7 @@ void BSP_printStackTrace(const BSP_Exception_frame *excPtr)
}
}
-void ppc_exc_print_frame_and_context(const BSP_Exception_frame *excPtr)
+void _BSP_Exception_frame_print(const CPU_Exception_frame *excPtr)
{
const Thread_Control *executing = _Thread_Executing;
bool synch = (int) excPtr->_EXC_number >= 0;
diff --git a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/vectors.h b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/vectors.h
index e62dfbd..b103dec 100644
--- a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/vectors.h
+++ b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/vectors.h
@@ -248,53 +248,7 @@ extern "C" {
* @{
*/
-typedef struct {
- unsigned EXC_SRR0;
- unsigned EXC_SRR1;
- unsigned _EXC_number;
- unsigned EXC_CR;
- unsigned EXC_CTR;
- unsigned EXC_XER;
- unsigned EXC_LR;
- #ifdef __SPE__
- uint32_t EXC_SPEFSCR;
- uint64_t EXC_ACC;
- #endif
- PPC_GPR_TYPE GPR0;
- PPC_GPR_TYPE GPR1;
- PPC_GPR_TYPE GPR2;
- PPC_GPR_TYPE GPR3;
- PPC_GPR_TYPE GPR4;
- PPC_GPR_TYPE GPR5;
- PPC_GPR_TYPE GPR6;
- PPC_GPR_TYPE GPR7;
- PPC_GPR_TYPE GPR8;
- PPC_GPR_TYPE GPR9;
- PPC_GPR_TYPE GPR10;
- PPC_GPR_TYPE GPR11;
- PPC_GPR_TYPE GPR12;
- PPC_GPR_TYPE GPR13;
- PPC_GPR_TYPE GPR14;
- PPC_GPR_TYPE GPR15;
- PPC_GPR_TYPE GPR16;
- PPC_GPR_TYPE GPR17;
- PPC_GPR_TYPE GPR18;
- PPC_GPR_TYPE GPR19;
- PPC_GPR_TYPE GPR20;
- PPC_GPR_TYPE GPR21;
- PPC_GPR_TYPE GPR22;
- PPC_GPR_TYPE GPR23;
- PPC_GPR_TYPE GPR24;
- PPC_GPR_TYPE GPR25;
- PPC_GPR_TYPE GPR26;
- PPC_GPR_TYPE GPR27;
- PPC_GPR_TYPE GPR28;
- PPC_GPR_TYPE GPR29;
- PPC_GPR_TYPE GPR30;
- PPC_GPR_TYPE GPR31;
- unsigned EXC_MSR;
- unsigned EXC_DAR;
-} BSP_Exception_frame;
+typedef CPU_Exception_frame BSP_Exception_frame;
/** @} */
@@ -319,8 +273,6 @@ extern exception_handler_t globalExceptHdl;
*/
void C_exception_handler(BSP_Exception_frame* excPtr);
-void ppc_exc_print_frame_and_context(const BSP_Exception_frame *excPtr);
-
void BSP_printStackTrace(const BSP_Exception_frame *excPtr);
/**
@@ -538,7 +490,6 @@ int ppc_exc_alignment_handler(BSP_Exception_frame *frame, unsigned excNum);
/*
* Compatibility with pc386
*/
-typedef BSP_Exception_frame CPU_Exception_frame;
typedef exception_handler_t cpuExcHandlerType;
#endif /* ASM */
diff --git a/cpukit/sapi/include/rtems/fatal.h b/cpukit/sapi/include/rtems/fatal.h
index 6692605..64344b3 100644
--- a/cpukit/sapi/include/rtems/fatal.h
+++ b/cpukit/sapi/include/rtems/fatal.h
@@ -37,6 +37,23 @@ extern "C" {
*/
/**
+ * @brief Exception frame.
+ */
+typedef CPU_Exception_frame rtems_exception_frame;
+
+/**
+ * @brief Prints the exception frame via printk().
+ *
+ * @see rtems_fatal() and RTEMS_FATAL_SOURCE_EXCEPTION.
+ */
+static inline void rtems_exception_frame_print(
+ const rtems_exception_frame *frame
+)
+{
+ _CPU_Exception_frame_print( frame );
+}
+
+/**
* @brief Invokes the internal error handler with a source of
* INTERNAL_ERROR_RTEMS_API and is internal set to false.
*
diff --git a/cpukit/score/cpu/arm/Makefile.am b/cpukit/score/cpu/arm/Makefile.am
index 0da1984..f0ddbd6 100644
--- a/cpukit/score/cpu/arm/Makefile.am
+++ b/cpukit/score/cpu/arm/Makefile.am
@@ -18,9 +18,11 @@ libscorecpu_a_SOURCES += arm_exc_abort.S
libscorecpu_a_SOURCES += arm_exc_interrupt.S
libscorecpu_a_SOURCES += arm_exc_handler_low.S
libscorecpu_a_SOURCES += arm_exc_handler_high.c
+libscorecpu_a_SOURCES += arm-exception-frame-print.c
libscorecpu_a_SOURCES += armv7m-context-initialize.c
libscorecpu_a_SOURCES += armv7m-context-restore.c
libscorecpu_a_SOURCES += armv7m-context-switch.c
+libscorecpu_a_SOURCES += armv7m-exception-frame-print.c
libscorecpu_a_SOURCES += armv7m-exception-handler-get.c
libscorecpu_a_SOURCES += armv7m-exception-handler-set.c
libscorecpu_a_SOURCES += armv7m-exception-priority-get.c
diff --git a/cpukit/score/cpu/arm/arm-exception-frame-print.c b/cpukit/score/cpu/arm/arm-exception-frame-print.c
new file mode 100644
index 0000000..4d89f69
--- /dev/null
+++ b/cpukit/score/cpu/arm/arm-exception-frame-print.c
@@ -0,0 +1,28 @@
+/*
+ * Copyright (c) 2012 embedded brains GmbH. All rights reserved.
+ *
+ * embedded brains GmbH
+ * Obere Lagerstr. 30
+ * 82178 Puchheim
+ * Germany
+ * <rtems at embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ */
+
+#ifdef HAVE_CONFIG_H
+ #include "config.h"
+#endif
+
+#include <rtems/score/cpu.h>
+
+#ifdef ARM_MULTILIB_ARCH_V4
+
+void _CPU_Exception_frame_print( const CPU_Exception_frame *frame )
+{
+ /* TODO */
+}
+
+#endif /* ARM_MULTILIB_ARCH_V4 */
diff --git a/cpukit/score/cpu/arm/armv7m-exception-frame-print.c b/cpukit/score/cpu/arm/armv7m-exception-frame-print.c
new file mode 100644
index 0000000..86931b2
--- /dev/null
+++ b/cpukit/score/cpu/arm/armv7m-exception-frame-print.c
@@ -0,0 +1,28 @@
+/*
+ * Copyright (c) 2012 embedded brains GmbH. All rights reserved.
+ *
+ * embedded brains GmbH
+ * Obere Lagerstr. 30
+ * 82178 Puchheim
+ * Germany
+ * <rtems at embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ */
+
+#ifdef HAVE_CONFIG_H
+ #include "config.h"
+#endif
+
+#include <rtems/score/cpu.h>
+
+#ifdef ARM_MULTILIB_ARCH_V7M
+
+void _CPU_Exception_frame_print( const CPU_Exception_frame *frame )
+{
+ /* TODO */
+}
+
+#endif /* ARM_MULTILIB_ARCH_V7M */
diff --git a/cpukit/score/cpu/arm/rtems/score/cpu.h b/cpukit/score/cpu/arm/rtems/score/cpu.h
index 1528533..b7666ad 100644
--- a/cpukit/score/cpu/arm/rtems/score/cpu.h
+++ b/cpukit/score/cpu/arm/rtems/score/cpu.h
@@ -580,10 +580,15 @@ typedef CPU_Exception_frame CPU_Interrupt_frame;
#else /* !defined(ARM_MULTILIB_ARCH_V4) */
+typedef struct {
+} CPU_Exception_frame;
+
typedef void CPU_Interrupt_frame;
#endif /* !defined(ARM_MULTILIB_ARCH_V4) */
+void _CPU_Exception_frame_print( const CPU_Exception_frame *frame );
+
#ifdef __cplusplus
}
#endif
diff --git a/cpukit/score/cpu/avr/Makefile.am b/cpukit/score/cpu/avr/Makefile.am
index 4079b69..efaf36e 100644
--- a/cpukit/score/cpu/avr/Makefile.am
+++ b/cpukit/score/cpu/avr/Makefile.am
@@ -161,6 +161,7 @@ include_rtems_avr_HEADERS += avr/wdt.h
noinst_LIBRARIES = libscorecpu.a
libscorecpu_a_SOURCES = cpu.c cpu_asm.S
+libscorecpu_a_SOURCES += avr-exception-frame-print.c
libscorecpu_a_CPPFLAGS = $(AM_CPPFLAGS)
include $(srcdir)/preinstall.am
diff --git a/cpukit/score/cpu/avr/avr-exception-frame-print.c b/cpukit/score/cpu/avr/avr-exception-frame-print.c
new file mode 100644
index 0000000..5ae4979
--- /dev/null
+++ b/cpukit/score/cpu/avr/avr-exception-frame-print.c
@@ -0,0 +1,24 @@
+/*
+ * Copyright (c) 2012 embedded brains GmbH. All rights reserved.
+ *
+ * embedded brains GmbH
+ * Obere Lagerstr. 30
+ * 82178 Puchheim
+ * Germany
+ * <rtems at embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ */
+
+#ifdef HAVE_CONFIG_H
+ #include "config.h"
+#endif
+
+#include <rtems/score/cpu.h>
+
+void _CPU_Exception_frame_print( const CPU_Exception_frame *frame )
+{
+ /* TODO */
+}
diff --git a/cpukit/score/cpu/avr/rtems/score/cpu.h b/cpukit/score/cpu/avr/rtems/score/cpu.h
index 5436c21..9c4d2f4 100644
--- a/cpukit/score/cpu/avr/rtems/score/cpu.h
+++ b/cpukit/score/cpu/avr/rtems/score/cpu.h
@@ -1112,6 +1112,11 @@ void _CPU_Context_restore_fp(
Context_Control_fp **fp_context_ptr
);
+typedef struct {
+} CPU_Exception_frame;
+
+void _CPU_Exception_frame_print( const CPU_Exception_frame *frame );
+
/* The following routine swaps the endian format of an unsigned int.
* It must be static because it is referenced indirectly.
*
diff --git a/cpukit/score/cpu/bfin/Makefile.am b/cpukit/score/cpu/bfin/Makefile.am
index dfec9ea..c8a7cf7 100644
--- a/cpukit/score/cpu/bfin/Makefile.am
+++ b/cpukit/score/cpu/bfin/Makefile.am
@@ -16,6 +16,7 @@ include_rtems_score_HEADERS += rtems/score/types.h
noinst_LIBRARIES = libscorecpu.a
libscorecpu_a_SOURCES = cpu.c cpu_asm.S
+libscorecpu_a_SOURCES += bfin-exception-frame-print.c
libscorecpu_a_CPPFLAGS = $(AM_CPPFLAGS)
include $(srcdir)/preinstall.am
diff --git a/cpukit/score/cpu/bfin/bfin-exception-frame-print.c b/cpukit/score/cpu/bfin/bfin-exception-frame-print.c
new file mode 100644
index 0000000..5ae4979
--- /dev/null
+++ b/cpukit/score/cpu/bfin/bfin-exception-frame-print.c
@@ -0,0 +1,24 @@
+/*
+ * Copyright (c) 2012 embedded brains GmbH. All rights reserved.
+ *
+ * embedded brains GmbH
+ * Obere Lagerstr. 30
+ * 82178 Puchheim
+ * Germany
+ * <rtems at embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ */
+
+#ifdef HAVE_CONFIG_H
+ #include "config.h"
+#endif
+
+#include <rtems/score/cpu.h>
+
+void _CPU_Exception_frame_print( const CPU_Exception_frame *frame )
+{
+ /* TODO */
+}
diff --git a/cpukit/score/cpu/bfin/rtems/score/cpu.h b/cpukit/score/cpu/bfin/rtems/score/cpu.h
index a8cfc17..491c30f 100644
--- a/cpukit/score/cpu/bfin/rtems/score/cpu.h
+++ b/cpukit/score/cpu/bfin/rtems/score/cpu.h
@@ -1204,6 +1204,11 @@ void _CPU_Context_restore_fp(
Context_Control_fp **fp_context_ptr
);
+typedef struct {
+} CPU_Exception_frame;
+
+void _CPU_Exception_frame_print( const CPU_Exception_frame *frame );
+
/**
* @ingroup CPUEndian
* The following routine swaps the endian format of an unsigned int.
diff --git a/cpukit/score/cpu/h8300/Makefile.am b/cpukit/score/cpu/h8300/Makefile.am
index 8ac7e76..5a3a8cc 100644
--- a/cpukit/score/cpu/h8300/Makefile.am
+++ b/cpukit/score/cpu/h8300/Makefile.am
@@ -10,6 +10,7 @@ include_rtems_score_HEADERS += rtems/score/types.h
noinst_LIBRARIES = libscorecpu.a
libscorecpu_a_SOURCES = cpu.c cpu_asm.S
+libscorecpu_a_SOURCES += h8300-exception-frame-print.c
libscorecpu_a_CPPFLAGS = $(AM_CPPFLAGS)
include $(srcdir)/preinstall.am
diff --git a/cpukit/score/cpu/h8300/h8300-exception-frame-print.c b/cpukit/score/cpu/h8300/h8300-exception-frame-print.c
new file mode 100644
index 0000000..5ae4979
--- /dev/null
+++ b/cpukit/score/cpu/h8300/h8300-exception-frame-print.c
@@ -0,0 +1,24 @@
+/*
+ * Copyright (c) 2012 embedded brains GmbH. All rights reserved.
+ *
+ * embedded brains GmbH
+ * Obere Lagerstr. 30
+ * 82178 Puchheim
+ * Germany
+ * <rtems at embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ */
+
+#ifdef HAVE_CONFIG_H
+ #include "config.h"
+#endif
+
+#include <rtems/score/cpu.h>
+
+void _CPU_Exception_frame_print( const CPU_Exception_frame *frame )
+{
+ /* TODO */
+}
diff --git a/cpukit/score/cpu/h8300/rtems/score/cpu.h b/cpukit/score/cpu/h8300/rtems/score/cpu.h
index 1811ce7..413b9e1 100644
--- a/cpukit/score/cpu/h8300/rtems/score/cpu.h
+++ b/cpukit/score/cpu/h8300/rtems/score/cpu.h
@@ -1095,6 +1095,11 @@ void _CPU_Context_restore_fp(
Context_Control_fp **fp_context_ptr
);
+typedef struct {
+} CPU_Exception_frame;
+
+void _CPU_Exception_frame_print( const CPU_Exception_frame *frame );
+
/* The following routine swaps the endian format of an unsigned int.
* It must be static because it is referenced indirectly.
*
diff --git a/cpukit/score/cpu/i386/cpu.c b/cpukit/score/cpu/i386/cpu.c
index acd2768..15ff3c7 100644
--- a/cpukit/score/cpu/i386/cpu.c
+++ b/cpukit/score/cpu/i386/cpu.c
@@ -117,7 +117,7 @@ struct Frame_ {
uintptr_t pc;
};
-static void _defaultExcHandler (CPU_Exception_frame *ctx)
+void _CPU_Exception_frame_print (const CPU_Exception_frame *ctx)
{
unsigned int faultAddr = 0;
printk("----------------------------------------------------------\n");
@@ -148,7 +148,6 @@ static void _defaultExcHandler (CPU_Exception_frame *ctx)
* because the eip points to the faulty instruction so...
*/
printk("Exception while executing ISR!!!. System locked\n");
- _CPU_Fatal_halt(faultAddr);
}
else {
struct Frame_ *fp = (struct Frame_*)ctx->ebp;
@@ -171,10 +170,17 @@ static void _defaultExcHandler (CPU_Exception_frame *ctx)
printk(" ************ FAULTY THREAD WILL BE SUSPENDED **************\n");
rtems_task_suspend(_Thread_Executing->Object.id);
#endif
- bsp_reset();
}
}
+static void _defaultExcHandler (CPU_Exception_frame *ctx)
+{
+ rtems_fatal(
+ RTEMS_FATAL_SOURCE_EXCEPTION,
+ (rtems_fatal_code) ctx
+ );
+}
+
cpuExcHandlerType _currentExcHandler = _defaultExcHandler;
extern void rtems_exception_prologue_0(void);
diff --git a/cpukit/score/cpu/i386/rtems/score/cpu.h b/cpukit/score/cpu/i386/rtems/score/cpu.h
index 2a48711..03d6209 100644
--- a/cpukit/score/cpu/i386/rtems/score/cpu.h
+++ b/cpukit/score/cpu/i386/rtems/score/cpu.h
@@ -665,6 +665,8 @@ void _CPU_Context_restore_fp(
} while (0)
#endif
+void _CPU_Exception_frame_print( const CPU_Exception_frame *frame );
+
#endif /* ASM */
#ifdef __cplusplus
diff --git a/cpukit/score/cpu/lm32/Makefile.am b/cpukit/score/cpu/lm32/Makefile.am
index d3b49bf..c03e11c 100644
--- a/cpukit/score/cpu/lm32/Makefile.am
+++ b/cpukit/score/cpu/lm32/Makefile.am
@@ -11,6 +11,7 @@ include_rtems_score_HEADERS += rtems/score/types.h
noinst_LIBRARIES = libscorecpu.a
libscorecpu_a_SOURCES = cpu.c cpu_asm.S irq.c
+libscorecpu_a_SOURCES += lm32-exception-frame-print.c
libscorecpu_a_CPPFLAGS = $(AM_CPPFLAGS)
include $(srcdir)/preinstall.am
diff --git a/cpukit/score/cpu/lm32/lm32-exception-frame-print.c b/cpukit/score/cpu/lm32/lm32-exception-frame-print.c
new file mode 100644
index 0000000..5ae4979
--- /dev/null
+++ b/cpukit/score/cpu/lm32/lm32-exception-frame-print.c
@@ -0,0 +1,24 @@
+/*
+ * Copyright (c) 2012 embedded brains GmbH. All rights reserved.
+ *
+ * embedded brains GmbH
+ * Obere Lagerstr. 30
+ * 82178 Puchheim
+ * Germany
+ * <rtems at embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ */
+
+#ifdef HAVE_CONFIG_H
+ #include "config.h"
+#endif
+
+#include <rtems/score/cpu.h>
+
+void _CPU_Exception_frame_print( const CPU_Exception_frame *frame )
+{
+ /* TODO */
+}
diff --git a/cpukit/score/cpu/lm32/rtems/score/cpu.h b/cpukit/score/cpu/lm32/rtems/score/cpu.h
index 9f0876a..917fe7f 100644
--- a/cpukit/score/cpu/lm32/rtems/score/cpu.h
+++ b/cpukit/score/cpu/lm32/rtems/score/cpu.h
@@ -1195,6 +1195,11 @@ void _CPU_Context_restore_fp(
Context_Control_fp **fp_context_ptr
);
+typedef struct {
+} CPU_Exception_frame;
+
+void _CPU_Exception_frame_print( const CPU_Exception_frame *frame );
+
/**
* @ingroup CPUEndian
* The following routine swaps the endian format of an unsigned int.
diff --git a/cpukit/score/cpu/m32c/Makefile.am b/cpukit/score/cpu/m32c/Makefile.am
index f836c58..4d63dfd 100644
--- a/cpukit/score/cpu/m32c/Makefile.am
+++ b/cpukit/score/cpu/m32c/Makefile.am
@@ -14,6 +14,7 @@ include_rtems_score_HEADERS += rtems/score/types.h
noinst_LIBRARIES = libscorecpu.a
libscorecpu_a_SOURCES = cpu.c cpu_asm.c context_switch.S context_init.c \
varvects.S
+libscorecpu_a_SOURCES += m32c-exception-frame-print.c
libscorecpu_a_CPPFLAGS = $(AM_CPPFLAGS)
include $(srcdir)/preinstall.am
diff --git a/cpukit/score/cpu/m32c/m32c-exception-frame-print.c b/cpukit/score/cpu/m32c/m32c-exception-frame-print.c
new file mode 100644
index 0000000..5ae4979
--- /dev/null
+++ b/cpukit/score/cpu/m32c/m32c-exception-frame-print.c
@@ -0,0 +1,24 @@
+/*
+ * Copyright (c) 2012 embedded brains GmbH. All rights reserved.
+ *
+ * embedded brains GmbH
+ * Obere Lagerstr. 30
+ * 82178 Puchheim
+ * Germany
+ * <rtems at embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ */
+
+#ifdef HAVE_CONFIG_H
+ #include "config.h"
+#endif
+
+#include <rtems/score/cpu.h>
+
+void _CPU_Exception_frame_print( const CPU_Exception_frame *frame )
+{
+ /* TODO */
+}
diff --git a/cpukit/score/cpu/m32c/rtems/score/cpu.h b/cpukit/score/cpu/m32c/rtems/score/cpu.h
index d83e93d..8719c42 100644
--- a/cpukit/score/cpu/m32c/rtems/score/cpu.h
+++ b/cpukit/score/cpu/m32c/rtems/score/cpu.h
@@ -1131,6 +1131,11 @@ void _CPU_Context_restore(
Context_Control *new_context
) RTEMS_COMPILER_NO_RETURN_ATTRIBUTE;
+typedef struct {
+} CPU_Exception_frame;
+
+void _CPU_Exception_frame_print( const CPU_Exception_frame *frame );
+
/**
* @ingroup CPUEndian
* The following routine swaps the endian format of an unsigned int.
diff --git a/cpukit/score/cpu/m32r/Makefile.am b/cpukit/score/cpu/m32r/Makefile.am
index 37b49ed..9db2c89 100644
--- a/cpukit/score/cpu/m32r/Makefile.am
+++ b/cpukit/score/cpu/m32r/Makefile.am
@@ -13,6 +13,7 @@ include_rtems_score_HEADERS += rtems/score/types.h
noinst_LIBRARIES = libscorecpu.a
libscorecpu_a_SOURCES = cpu.c cpu_asm.c context_switch.S context_init.c
+libscorecpu_a_SOURCES += m32r-exception-frame-print.c
libscorecpu_a_CPPFLAGS = $(AM_CPPFLAGS)
include $(srcdir)/preinstall.am
diff --git a/cpukit/score/cpu/m32r/m32r-exception-frame-print.c b/cpukit/score/cpu/m32r/m32r-exception-frame-print.c
new file mode 100644
index 0000000..5ae4979
--- /dev/null
+++ b/cpukit/score/cpu/m32r/m32r-exception-frame-print.c
@@ -0,0 +1,24 @@
+/*
+ * Copyright (c) 2012 embedded brains GmbH. All rights reserved.
+ *
+ * embedded brains GmbH
+ * Obere Lagerstr. 30
+ * 82178 Puchheim
+ * Germany
+ * <rtems at embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ */
+
+#ifdef HAVE_CONFIG_H
+ #include "config.h"
+#endif
+
+#include <rtems/score/cpu.h>
+
+void _CPU_Exception_frame_print( const CPU_Exception_frame *frame )
+{
+ /* TODO */
+}
diff --git a/cpukit/score/cpu/m32r/rtems/score/cpu.h b/cpukit/score/cpu/m32r/rtems/score/cpu.h
index 02bc928..cc5fc56 100644
--- a/cpukit/score/cpu/m32r/rtems/score/cpu.h
+++ b/cpukit/score/cpu/m32r/rtems/score/cpu.h
@@ -1189,6 +1189,11 @@ void _CPU_Context_restore_fp(
Context_Control_fp **fp_context_ptr
);
+typedef struct {
+} CPU_Exception_frame;
+
+void _CPU_Exception_frame_print( const CPU_Exception_frame *frame );
+
/**
* @ingroup CPUEndian
* The following routine swaps the endian format of an unsigned int.
diff --git a/cpukit/score/cpu/m68k/Makefile.am b/cpukit/score/cpu/m68k/Makefile.am
index 319cbdd..5669177 100644
--- a/cpukit/score/cpu/m68k/Makefile.am
+++ b/cpukit/score/cpu/m68k/Makefile.am
@@ -18,6 +18,7 @@ include_rtems_score_HEADERS += rtems/score/m68k.h
include_rtems_score_HEADERS += rtems/score/types.h
libscorecpu_a_SOURCES = cpu.c cpu_asm.S
+libscorecpu_a_SOURCES += m68k-exception-frame-print.c
include $(srcdir)/preinstall.am
include $(top_srcdir)/automake/local.am
diff --git a/cpukit/score/cpu/m68k/m68k-exception-frame-print.c b/cpukit/score/cpu/m68k/m68k-exception-frame-print.c
new file mode 100644
index 0000000..5ae4979
--- /dev/null
+++ b/cpukit/score/cpu/m68k/m68k-exception-frame-print.c
@@ -0,0 +1,24 @@
+/*
+ * Copyright (c) 2012 embedded brains GmbH. All rights reserved.
+ *
+ * embedded brains GmbH
+ * Obere Lagerstr. 30
+ * 82178 Puchheim
+ * Germany
+ * <rtems at embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ */
+
+#ifdef HAVE_CONFIG_H
+ #include "config.h"
+#endif
+
+#include <rtems/score/cpu.h>
+
+void _CPU_Exception_frame_print( const CPU_Exception_frame *frame )
+{
+ /* TODO */
+}
diff --git a/cpukit/score/cpu/m68k/rtems/score/cpu.h b/cpukit/score/cpu/m68k/rtems/score/cpu.h
index 89b0295..fb970eb 100644
--- a/cpukit/score/cpu/m68k/rtems/score/cpu.h
+++ b/cpukit/score/cpu/m68k/rtems/score/cpu.h
@@ -709,6 +709,8 @@ void _CPU_Context_restore_fp(
Context_Control_fp **fp_context_ptr
);
+void _CPU_Exception_frame_print( const CPU_Exception_frame *frame );
+
#if (M68K_HAS_FPSP_PACKAGE == 1)
/*
* Hooks for the Floating Point Support Package (FPSP) provided by Motorola
diff --git a/cpukit/score/cpu/mips/rtems/score/cpu.h b/cpukit/score/cpu/mips/rtems/score/cpu.h
index 9aa72d4..1da23db 100644
--- a/cpukit/score/cpu/mips/rtems/score/cpu.h
+++ b/cpukit/score/cpu/mips/rtems/score/cpu.h
@@ -609,6 +609,8 @@ typedef struct
} CPU_Interrupt_frame;
+typedef CPU_Interrupt_frame CPU_Exception_frame;
+
/*
* This variable is optional. It is used on CPUs on which it is difficult
* to generate an "uninitialized" FP context. It is filled in by
@@ -703,6 +705,8 @@ extern unsigned int mips_interrupt_number_of_vectors;
#define CPU_STACK_ALIGNMENT CPU_ALIGNMENT
+void mips_vector_exceptions( CPU_Interrupt_frame *frame );
+
/*
* ISR handler macros
*/
@@ -1112,6 +1116,15 @@ void _CPU_Context_restore_fp(
Context_Control_fp **fp_context_ptr
);
+void _BSP_Exception_frame_print( const CPU_Exception_frame *frame );
+
+static inline void _CPU_Exception_frame_print(
+ const CPU_Exception_frame *frame
+)
+{
+ _BSP_Exception_frame_print( frame );
+}
+
/* The following routine swaps the endian format of an unsigned int.
* It must be static because it is referenced indirectly.
*
diff --git a/cpukit/score/cpu/nios2/Makefile.am b/cpukit/score/cpu/nios2/Makefile.am
index f662946..c2947dd 100644
--- a/cpukit/score/cpu/nios2/Makefile.am
+++ b/cpukit/score/cpu/nios2/Makefile.am
@@ -24,6 +24,7 @@ libscorecpu_a_SOURCES += nios2-context-initialize.c
libscorecpu_a_SOURCES += nios2-context-switch.S
libscorecpu_a_SOURCES += nios2-eic-il-low-level.S
libscorecpu_a_SOURCES += nios2-eic-rsie-low-level.S
+libscorecpu_a_SOURCES += nios2-exception-frame-print.c
libscorecpu_a_SOURCES += nios2-fatal-halt.c
libscorecpu_a_SOURCES += nios2-iic-low-level.S
libscorecpu_a_SOURCES += nios2-initialize.c
diff --git a/cpukit/score/cpu/nios2/nios2-exception-frame-print.c b/cpukit/score/cpu/nios2/nios2-exception-frame-print.c
new file mode 100644
index 0000000..5ae4979
--- /dev/null
+++ b/cpukit/score/cpu/nios2/nios2-exception-frame-print.c
@@ -0,0 +1,24 @@
+/*
+ * Copyright (c) 2012 embedded brains GmbH. All rights reserved.
+ *
+ * embedded brains GmbH
+ * Obere Lagerstr. 30
+ * 82178 Puchheim
+ * Germany
+ * <rtems at embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ */
+
+#ifdef HAVE_CONFIG_H
+ #include "config.h"
+#endif
+
+#include <rtems/score/cpu.h>
+
+void _CPU_Exception_frame_print( const CPU_Exception_frame *frame )
+{
+ /* TODO */
+}
diff --git a/cpukit/score/cpu/nios2/rtems/score/cpu.h b/cpukit/score/cpu/nios2/rtems/score/cpu.h
index 4d61c42..68ab01d 100644
--- a/cpukit/score/cpu/nios2/rtems/score/cpu.h
+++ b/cpukit/score/cpu/nios2/rtems/score/cpu.h
@@ -338,6 +338,8 @@ void _CPU_Context_restore(
Context_Control *new_context
) RTEMS_COMPILER_NO_RETURN_ATTRIBUTE;
+void _CPU_Exception_frame_print( const CPU_Exception_frame *frame );
+
static inline uint32_t CPU_swap_u32( uint32_t value )
{
uint32_t byte1, byte2, byte3, byte4, swapped;
diff --git a/cpukit/score/cpu/no_cpu/rtems/score/cpu.h b/cpukit/score/cpu/no_cpu/rtems/score/cpu.h
index 9ab1f26..e137122 100644
--- a/cpukit/score/cpu/no_cpu/rtems/score/cpu.h
+++ b/cpukit/score/cpu/no_cpu/rtems/score/cpu.h
@@ -1263,6 +1263,19 @@ void _CPU_Context_restore_fp(
Context_Control_fp **fp_context_ptr
);
+typedef struct {
+ uint32_t processor_state_register;
+ uint32_t integer_registers;
+ double float_registers;
+} CPU_Exception_frame;
+
+/**
+ * @brief Prints the exception frame via printk().
+ *
+ * @see rtems_fatal() and RTEMS_FATAL_SOURCE_EXCEPTION.
+ */
+void _CPU_Exception_frame_print( const CPU_Exception_frame *frame );
+
/**
* @ingroup CPUEndian
* The following routine swaps the endian format of an unsigned int.
diff --git a/cpukit/score/cpu/powerpc/rtems/score/cpu.h b/cpukit/score/cpu/powerpc/rtems/score/cpu.h
index 31b4e7c..93e632d 100644
--- a/cpukit/score/cpu/powerpc/rtems/score/cpu.h
+++ b/cpukit/score/cpu/powerpc/rtems/score/cpu.h
@@ -990,6 +990,63 @@ void _CPU_Context_restore_fp(
Context_Control_fp **fp_context_ptr
);
+typedef struct {
+ uint32_t EXC_SRR0;
+ uint32_t EXC_SRR1;
+ uint32_t _EXC_number;
+ uint32_t EXC_CR;
+ uint32_t EXC_CTR;
+ uint32_t EXC_XER;
+ uint32_t EXC_LR;
+ #ifdef __SPE__
+ uint32_t EXC_SPEFSCR;
+ uint64_t EXC_ACC;
+ #endif
+ PPC_GPR_TYPE GPR0;
+ PPC_GPR_TYPE GPR1;
+ PPC_GPR_TYPE GPR2;
+ PPC_GPR_TYPE GPR3;
+ PPC_GPR_TYPE GPR4;
+ PPC_GPR_TYPE GPR5;
+ PPC_GPR_TYPE GPR6;
+ PPC_GPR_TYPE GPR7;
+ PPC_GPR_TYPE GPR8;
+ PPC_GPR_TYPE GPR9;
+ PPC_GPR_TYPE GPR10;
+ PPC_GPR_TYPE GPR11;
+ PPC_GPR_TYPE GPR12;
+ PPC_GPR_TYPE GPR13;
+ PPC_GPR_TYPE GPR14;
+ PPC_GPR_TYPE GPR15;
+ PPC_GPR_TYPE GPR16;
+ PPC_GPR_TYPE GPR17;
+ PPC_GPR_TYPE GPR18;
+ PPC_GPR_TYPE GPR19;
+ PPC_GPR_TYPE GPR20;
+ PPC_GPR_TYPE GPR21;
+ PPC_GPR_TYPE GPR22;
+ PPC_GPR_TYPE GPR23;
+ PPC_GPR_TYPE GPR24;
+ PPC_GPR_TYPE GPR25;
+ PPC_GPR_TYPE GPR26;
+ PPC_GPR_TYPE GPR27;
+ PPC_GPR_TYPE GPR28;
+ PPC_GPR_TYPE GPR29;
+ PPC_GPR_TYPE GPR30;
+ PPC_GPR_TYPE GPR31;
+ uint32_t EXC_MSR;
+ uint32_t EXC_DAR;
+} CPU_Exception_frame;
+
+void _BSP_Exception_frame_print( const CPU_Exception_frame *frame );
+
+static inline void _CPU_Exception_frame_print(
+ const CPU_Exception_frame *frame
+)
+{
+ _BSP_Exception_frame_print( frame );
+}
+
/*
* _CPU_Initialize_altivec()
*
diff --git a/cpukit/score/cpu/sh/Makefile.am b/cpukit/score/cpu/sh/Makefile.am
index 8e148d8..a524dfc 100644
--- a/cpukit/score/cpu/sh/Makefile.am
+++ b/cpukit/score/cpu/sh/Makefile.am
@@ -11,6 +11,7 @@ include_rtems_score_HEADERS += rtems/score/sh_io.h
noinst_LIBRARIES = libscorecpu.a
libscorecpu_a_SOURCES = cpu.c context.c
+libscorecpu_a_SOURCES += sh-exception-frame-print.c
libscorecpu_a_CPPFLAGS = $(AM_CPPFLAGS)
include $(srcdir)/preinstall.am
diff --git a/cpukit/score/cpu/sh/rtems/score/cpu.h b/cpukit/score/cpu/sh/rtems/score/cpu.h
index 789024e..53cceac 100644
--- a/cpukit/score/cpu/sh/rtems/score/cpu.h
+++ b/cpukit/score/cpu/sh/rtems/score/cpu.h
@@ -885,6 +885,10 @@ void _CPU_Context_restore_fp(
Context_Control_fp **fp_context_ptr
);
+typedef struct {
+} CPU_Exception_frame;
+
+void _CPU_Exception_frame_print( const CPU_Exception_frame *frame );
#ifdef __cplusplus
}
diff --git a/cpukit/score/cpu/sh/sh-exception-frame-print.c b/cpukit/score/cpu/sh/sh-exception-frame-print.c
new file mode 100644
index 0000000..5ae4979
--- /dev/null
+++ b/cpukit/score/cpu/sh/sh-exception-frame-print.c
@@ -0,0 +1,24 @@
+/*
+ * Copyright (c) 2012 embedded brains GmbH. All rights reserved.
+ *
+ * embedded brains GmbH
+ * Obere Lagerstr. 30
+ * 82178 Puchheim
+ * Germany
+ * <rtems at embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ */
+
+#ifdef HAVE_CONFIG_H
+ #include "config.h"
+#endif
+
+#include <rtems/score/cpu.h>
+
+void _CPU_Exception_frame_print( const CPU_Exception_frame *frame )
+{
+ /* TODO */
+}
diff --git a/cpukit/score/cpu/sparc/rtems/score/cpu.h b/cpukit/score/cpu/sparc/rtems/score/cpu.h
index d92b63c..2e1e718 100644
--- a/cpukit/score/cpu/sparc/rtems/score/cpu.h
+++ b/cpukit/score/cpu/sparc/rtems/score/cpu.h
@@ -1221,6 +1221,20 @@ void _CPU_Context_restore_fp(
Context_Control_fp **fp_context_ptr
);
+typedef struct {
+ uint32_t trap;
+ CPU_Interrupt_frame *isf;
+} CPU_Exception_frame;
+
+void _BSP_Exception_frame_print( const CPU_Exception_frame *frame );
+
+static inline void _CPU_Exception_frame_print(
+ const CPU_Exception_frame *frame
+)
+{
+ _BSP_Exception_frame_print( frame );
+}
+
/**
* @brief SPARC Specific Method to Endian Swap an uint32_t
*
diff --git a/cpukit/score/cpu/sparc64/Makefile.am b/cpukit/score/cpu/sparc64/Makefile.am
index 33ba844..2897a46 100644
--- a/cpukit/score/cpu/sparc64/Makefile.am
+++ b/cpukit/score/cpu/sparc64/Makefile.am
@@ -13,6 +13,7 @@ include_rtems_score_HEADERS += rtems/score/types.h
noinst_LIBRARIES = libscorecpu.a
libscorecpu_a_SOURCES = context.S cpu.c
+libscorecpu_a_SOURCES += sparc64-exception-frame-print.c
libscorecpu_a_CPPFLAGS = $(AM_CPPFLAGS)
include $(srcdir)/preinstall.am
diff --git a/cpukit/score/cpu/sparc64/rtems/score/cpu.h b/cpukit/score/cpu/sparc64/rtems/score/cpu.h
index f821e96..88457e8 100644
--- a/cpukit/score/cpu/sparc64/rtems/score/cpu.h
+++ b/cpukit/score/cpu/sparc64/rtems/score/cpu.h
@@ -1024,6 +1024,11 @@ void _CPU_Context_restore_fp(
Context_Control_fp **fp_context_ptr
);
+typedef struct {
+} CPU_Exception_frame;
+
+void _CPU_Exception_frame_print( const CPU_Exception_frame *frame );
+
/*
* CPU_swap_u32
*
diff --git a/cpukit/score/cpu/sparc64/sparc64-exception-frame-print.c b/cpukit/score/cpu/sparc64/sparc64-exception-frame-print.c
new file mode 100644
index 0000000..5ae4979
--- /dev/null
+++ b/cpukit/score/cpu/sparc64/sparc64-exception-frame-print.c
@@ -0,0 +1,24 @@
+/*
+ * Copyright (c) 2012 embedded brains GmbH. All rights reserved.
+ *
+ * embedded brains GmbH
+ * Obere Lagerstr. 30
+ * 82178 Puchheim
+ * Germany
+ * <rtems at embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ */
+
+#ifdef HAVE_CONFIG_H
+ #include "config.h"
+#endif
+
+#include <rtems/score/cpu.h>
+
+void _CPU_Exception_frame_print( const CPU_Exception_frame *frame )
+{
+ /* TODO */
+}
diff --git a/cpukit/score/cpu/v850/Makefile.am b/cpukit/score/cpu/v850/Makefile.am
index 2119f62..6f1ce67 100644
--- a/cpukit/score/cpu/v850/Makefile.am
+++ b/cpukit/score/cpu/v850/Makefile.am
@@ -11,6 +11,7 @@ include_rtems_score_HEADERS += rtems/score/cpu_asm.h rtems/score/types.h
noinst_LIBRARIES = libscorecpu.a
libscorecpu_a_SOURCES = cpu.c
libscorecpu_a_SOURCES += cpu_asm.S
+libscorecpu_a_SOURCES += v850-exception-frame-print.c
libscorecpu_a_CPPFLAGS = $(AM_CPPFLAGS)
include $(srcdir)/preinstall.am
diff --git a/cpukit/score/cpu/v850/rtems/score/cpu.h b/cpukit/score/cpu/v850/rtems/score/cpu.h
index 371bc32..cf855d3 100644
--- a/cpukit/score/cpu/v850/rtems/score/cpu.h
+++ b/cpukit/score/cpu/v850/rtems/score/cpu.h
@@ -1124,6 +1124,11 @@ void _CPU_Context_restore_fp(
);
#endif
+typedef struct {
+} CPU_Exception_frame;
+
+void _CPU_Exception_frame_print( const CPU_Exception_frame *frame );
+
/**
* @ingroup CPUEndian
* The following routine swaps the endian format of an unsigned int.
diff --git a/cpukit/score/cpu/v850/v850-exception-frame-print.c b/cpukit/score/cpu/v850/v850-exception-frame-print.c
new file mode 100644
index 0000000..5ae4979
--- /dev/null
+++ b/cpukit/score/cpu/v850/v850-exception-frame-print.c
@@ -0,0 +1,24 @@
+/*
+ * Copyright (c) 2012 embedded brains GmbH. All rights reserved.
+ *
+ * embedded brains GmbH
+ * Obere Lagerstr. 30
+ * 82178 Puchheim
+ * Germany
+ * <rtems at embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ */
+
+#ifdef HAVE_CONFIG_H
+ #include "config.h"
+#endif
+
+#include <rtems/score/cpu.h>
+
+void _CPU_Exception_frame_print( const CPU_Exception_frame *frame )
+{
+ /* TODO */
+}
diff --git a/cpukit/score/include/rtems/score/interr.h b/cpukit/score/include/rtems/score/interr.h
index 367c1ab..e325e68 100644
--- a/cpukit/score/include/rtems/score/interr.h
+++ b/cpukit/score/include/rtems/score/interr.h
@@ -98,13 +98,13 @@ typedef enum {
RTEMS_FATAL_SOURCE_STACK_CHECKER,
/**
- * @brief Fatal source of the PowerPC exceptions.
+ * @brief Fatal source of the exceptions.
*
* The fatal code is the pointer value of the exception frame pointer.
*
- * @see BSP_Exception_frame.
+ * @see rtems_exception_frame and rtems_exception_frame_print().
*/
- RTEMS_FATAL_SOURCE_POWERPC_EXCEPTION,
+ RTEMS_FATAL_SOURCE_EXCEPTION,
/**
* @brief The last available fatal source.
diff --git a/doc/user/fatal.t b/doc/user/fatal.t
index 42a2432..1b725e8 100644
--- a/doc/user/fatal.t
+++ b/doc/user/fatal.t
@@ -203,6 +203,33 @@ false. See also @code{@value{DIRPREFIX}fatal_error_occurred}.
@c
@c
@page
+ at subsection EXCEPTION_FRAME_PRINT - Prints the exception frame
+
+ at cindex exception frame
+
+ at subheading CALLING SEQUENCE:
+
+ at ifset is-C
+ at findex rtems_exception_frame_print
+ at example
+void rtems_exception_frame_print(
+ const rtems_exception_frame *frame
+);
+ at end example
+ at end ifset
+
+ at subheading DIRECTIVE STATUS CODES
+
+NONE
+
+ at subheading DESCRIPTION:
+
+Prints the exception frame via printk().
+
+ at c
+ at c
+ at c
+ at page
@subsection INTERNAL_ERROR_DESCRIPTION - Returns a description for an internal error code
@cindex fatal error
diff --git a/testsuites/sptests/Makefile.am b/testsuites/sptests/Makefile.am
index 1e183eb..c00d73c 100644
--- a/testsuites/sptests/Makefile.am
+++ b/testsuites/sptests/Makefile.am
@@ -28,6 +28,7 @@ SUBDIRS = \
spsimplesched01 spsimplesched02 spsimplesched03 spnsext01 \
spedfsched01 spedfsched02 spedfsched03 \
spcbssched01 spcbssched02 spcbssched03 spqreslib sptimespec01
+SUBDIRS += spfatal26
SUBDIRS += speventtransient01
SUBDIRS += speventsystem01
SUBDIRS += spinternalerror01
diff --git a/testsuites/sptests/configure.ac b/testsuites/sptests/configure.ac
index a71746f..6d899a3 100644
--- a/testsuites/sptests/configure.ac
+++ b/testsuites/sptests/configure.ac
@@ -27,6 +27,7 @@ AC_CHECK_SIZEOF([time_t])
# Explicitly list all Makefiles here
AC_CONFIG_FILES([Makefile
+spfatal26/Makefile
spinternalerror02/Makefile
spinternalerror01/Makefile
speventsystem01/Makefile
diff --git a/testsuites/sptests/spfatal26/Makefile.am b/testsuites/sptests/spfatal26/Makefile.am
new file mode 100644
index 0000000..9cc5dba
--- /dev/null
+++ b/testsuites/sptests/spfatal26/Makefile.am
@@ -0,0 +1,19 @@
+rtems_tests_PROGRAMS = spfatal26
+spfatal26_SOURCES = init.c
+
+dist_rtems_tests_DATA = spfatal26.scn spfatal26.doc
+
+include $(RTEMS_ROOT)/make/custom/@RTEMS_BSP at .cfg
+include $(top_srcdir)/../automake/compile.am
+include $(top_srcdir)/../automake/leaf.am
+
+AM_CPPFLAGS += -I$(top_srcdir)/../support/include
+
+LINK_OBJS = $(spfatal26_OBJECTS)
+LINK_LIBS = $(spfatal26_LDLIBS)
+
+spfatal26$(EXEEXT): $(spfatal26_OBJECTS) $(spfatal26_DEPENDENCIES)
+ @rm -f spfatal26$(EXEEXT)
+ $(make-exe)
+
+include $(top_srcdir)/../automake/local.am
diff --git a/testsuites/sptests/spfatal26/init.c b/testsuites/sptests/spfatal26/init.c
new file mode 100644
index 0000000..556410f
--- /dev/null
+++ b/testsuites/sptests/spfatal26/init.c
@@ -0,0 +1,85 @@
+/*
+ * Copyright (c) 2012 embedded brains GmbH. All rights reserved.
+ *
+ * embedded brains GmbH
+ * Obere Lagerstr. 30
+ * 82178 Puchheim
+ * Germany
+ * <rtems at embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ */
+
+#ifdef HAVE_CONFIG_H
+ #include "config.h"
+#endif
+
+#include "tmacros.h"
+
+#include <limits.h>
+
+#include <rtems.h>
+
+static void provoke_aligment_or_data_access_exception( void )
+{
+ uintptr_t one = 1;
+ int i = sizeof(void *) * CHAR_BIT;
+ uintptr_t n = 1;
+ uintptr_t base = 0;
+ uintptr_t inc;
+
+ *(volatile uint64_t *) base;
+
+ do {
+ int j;
+
+ --i;
+ base = one << i;
+ inc = base << 1;
+
+ for (j = 0; j < n; ++j, base += inc) {
+ *(volatile uint64_t *) base;
+ }
+
+ n <<= 1;
+ } while (i > 0);
+}
+
+static void Init( rtems_task_argument arg )
+{
+ printk( "\n\n*** TEST SPFATAL 26 ***\n" );
+
+ provoke_aligment_or_data_access_exception();
+
+ rtems_test_assert( 0 );
+}
+
+static void fatal_extension(
+ rtems_fatal_source source,
+ bool is_internal,
+ rtems_fatal_code code
+)
+{
+ rtems_test_assert( source == RTEMS_FATAL_SOURCE_EXCEPTION );
+ rtems_test_assert( !is_internal );
+
+ rtems_exception_frame_print( (const rtems_exception_frame *) code );
+
+ printk( "*** END OF TEST SPFATAL 26 ***\n" );
+}
+
+#define CONFIGURE_INITIAL_EXTENSIONS { .fatal = fatal_extension }
+
+#define CONFIGURE_APPLICATION_DOES_NOT_NEED_CLOCK_DRIVER
+
+#define CONFIGURE_APPLICATION_DISABLE_FILESYSTEM
+
+#define CONFIGURE_MAXIMUM_TASKS 1
+
+#define CONFIGURE_RTEMS_INIT_TASKS_TABLE
+
+#define CONFIGURE_INIT
+
+#include <rtems/confdefs.h>
diff --git a/testsuites/sptests/spfatal26/spfatal26.doc b/testsuites/sptests/spfatal26/spfatal26.doc
new file mode 100644
index 0000000..fb9097c
--- /dev/null
+++ b/testsuites/sptests/spfatal26/spfatal26.doc
@@ -0,0 +1,11 @@
+This file describes the directives and concepts tested by this test set.
+
+test set name: spfatal26
+
+directives:
+
+ - rtems_exception_frame_print
+
+concepts:
+
+ - Ensure that we get an fatal condition with RTEMS_FATAL_SOURCE_EXCEPTION.
diff --git a/testsuites/sptests/spfatal26/spfatal26.scn b/testsuites/sptests/spfatal26/spfatal26.scn
new file mode 100644
index 0000000..0dfa62a
--- /dev/null
+++ b/testsuites/sptests/spfatal26/spfatal26.scn
@@ -0,0 +1,2 @@
+*** TEST SPFATAL 26 ***
+*** END OF TEST SPFATAL 26 ***
--
1.7.10.4
More information about the devel
mailing list