[PATCH 2/2] Initial bsp for Tiny6410

Dhananjay Balan mb.dhananjay at gmail.com
Wed Apr 17 08:47:00 UTC 2013


Hi Peng,

On 17 April 2013 11:35, Peng Fan <van.freenix at gmail.com> wrote:

> If any questions, you may post on the mailing list not just me.
> My Tiny6410 board is developed by Firendly ARM.
>

What I have here is a Witech OK6410 [1] I see both hardware uses the same
core modules, so Will it be possible for me to use this patch to run RTEMS
over this SBC?


> It's web is here: http://www.friendlyarm.net/products/tiny6410
> The patch now is simple, only support timer and serial, with most of
> the hardware configuration done in uboot.Now, I am also trying to
> add nand support. It does run on my board. You may try.
>

Can you document the steps to load the image into the board and also the
u-boot tweaks you did somewhere in wiki?

>  Any problem, post it to the mailing list. Thanks.
>
> Regards,
> Peng.
>
>
>
> 2013/4/17 Dhananjay Balan <mb.dhananjay at gmail.com>
>
>> Hi,
>> I have with me an Chineese ARM SBC built around Samsung 6410. It is
>> manufactured by witech Inc. Does this mean I can run RTEMS on it?
>> On Apr 17, 2013 11:01 AM, "Peng Fan" <van.freenix at gmail.com> wrote:
>>
>>> ---
>>>  c/src/lib/libbsp/arm/Makefile.am                   |    1 +
>>>  c/src/lib/libbsp/arm/acinclude.m4                  |    2 +
>>>  c/src/lib/libbsp/arm/preinstall.am                 |    4 +
>>>  c/src/lib/libbsp/arm/shared/startup/linkcmds.armv6 |   26 +++
>>>  c/src/lib/libbsp/arm/tiny6410/Makefile.am          |   62 ++++++
>>>  c/src/lib/libbsp/arm/tiny6410/README               |   23 ++
>>>  c/src/lib/libbsp/arm/tiny6410/bsp_specs            |   13 ++
>>>  c/src/lib/libbsp/arm/tiny6410/configure.ac         |   23 ++
>>>  c/src/lib/libbsp/arm/tiny6410/console/uart.c       |  229
>>> ++++++++++++++++++++
>>>  c/src/lib/libbsp/arm/tiny6410/debug/debug.c        |   60 +++++
>>>  c/src/lib/libbsp/arm/tiny6410/include/bsp.h        |   60 +++++
>>>  .../libbsp/arm/tiny6410/make/custom/tiny6410.cfg   |   21 ++
>>>  c/src/lib/libbsp/arm/tiny6410/preinstall.am        |   83 +++++++
>>>  c/src/lib/libbsp/arm/tiny6410/sh-hello             |   13 ++
>>>  c/src/lib/libbsp/arm/tiny6410/startup/bspidle.c    |   25 +++
>>>  c/src/lib/libbsp/arm/tiny6410/startup/bspreset.c   |   37 ++++
>>>  c/src/lib/libbsp/arm/tiny6410/startup/bspstart.c   |   83 +++++++
>>>  .../libbsp/arm/tiny6410/startup/bspstarthooks.c    |  146 +++++++++++++
>>>  c/src/lib/libbsp/arm/tiny6410/startup/linkcmds     |   25 +++
>>>  c/src/lib/libbsp/arm/tiny6410/startup/memmap.c     |   29 +++
>>>  c/src/lib/libcpu/arm/Makefile.am                   |   25 +++
>>>  c/src/lib/libcpu/arm/configure.ac                  |    2 +
>>>  c/src/lib/libcpu/arm/preinstall.am                 |   13 ++
>>>  c/src/lib/libcpu/arm/s3c64xx/clock/clockdrv.c      |  141 ++++++++++++
>>>  c/src/lib/libcpu/arm/s3c64xx/clock/support.c       |   51 +++++
>>>  c/src/lib/libcpu/arm/s3c64xx/include/s3c6410.h     |  211
>>> ++++++++++++++++++
>>>  c/src/lib/libcpu/arm/s3c64xx/include/s3c64xx.h     |   15 ++
>>>  c/src/lib/libcpu/arm/s3c64xx/irq/irq.c             |   79 +++++++
>>>  c/src/lib/libcpu/arm/s3c64xx/irq/irq.h             |  100 +++++++++
>>>  c/src/lib/libcpu/arm/shared/include/arm-cp15.h     |   17 ++
>>>  30 files changed, 1619 insertions(+)
>>>  create mode 100644 c/src/lib/libbsp/arm/shared/startup/linkcmds.armv6
>>>  create mode 100644 c/src/lib/libbsp/arm/tiny6410/Makefile.am
>>>  create mode 100644 c/src/lib/libbsp/arm/tiny6410/README
>>>  create mode 100644 c/src/lib/libbsp/arm/tiny6410/bsp_specs
>>>  create mode 100644 c/src/lib/libbsp/arm/tiny6410/configure.ac
>>>  create mode 100644 c/src/lib/libbsp/arm/tiny6410/console/uart.c
>>>  create mode 100644 c/src/lib/libbsp/arm/tiny6410/debug/debug.c
>>>  create mode 100644 c/src/lib/libbsp/arm/tiny6410/include/bsp.h
>>>  create mode 100644
>>> c/src/lib/libbsp/arm/tiny6410/make/custom/tiny6410.cfg
>>>  create mode 100644 c/src/lib/libbsp/arm/tiny6410/preinstall.am
>>>  create mode 100755 c/src/lib/libbsp/arm/tiny6410/sh-hello
>>>  create mode 100644 c/src/lib/libbsp/arm/tiny6410/startup/bspidle.c
>>>  create mode 100644 c/src/lib/libbsp/arm/tiny6410/startup/bspreset.c
>>>  create mode 100644 c/src/lib/libbsp/arm/tiny6410/startup/bspstart.c
>>>  create mode 100644 c/src/lib/libbsp/arm/tiny6410/startup/bspstarthooks.c
>>>  create mode 100644 c/src/lib/libbsp/arm/tiny6410/startup/linkcmds
>>>  create mode 100644 c/src/lib/libbsp/arm/tiny6410/startup/memmap.c
>>>  create mode 100644 c/src/lib/libcpu/arm/s3c64xx/clock/clockdrv.c
>>>  create mode 100644 c/src/lib/libcpu/arm/s3c64xx/clock/support.c
>>>  create mode 100644 c/src/lib/libcpu/arm/s3c64xx/include/s3c6410.h
>>>  create mode 100644 c/src/lib/libcpu/arm/s3c64xx/include/s3c64xx.h
>>>  create mode 100644 c/src/lib/libcpu/arm/s3c64xx/irq/irq.c
>>>  create mode 100644 c/src/lib/libcpu/arm/s3c64xx/irq/irq.h
>>>
>>> diff --git a/c/src/lib/libbsp/arm/Makefile.am
>>> b/c/src/lib/libbsp/arm/Makefile.am
>>> index 9783354..bd2ee0c 100644
>>> --- a/c/src/lib/libbsp/arm/Makefile.am
>>> +++ b/c/src/lib/libbsp/arm/Makefile.am
>>> @@ -10,6 +10,7 @@ include_bsp_HEADERS = shared/include/linker-symbols.h
>>>
>>>  dist_project_lib_DATA = shared/startup/linkcmds.base
>>>  dist_project_lib_DATA += shared/startup/linkcmds.armv4
>>> +dist_project_lib_DATA += shared/startup/linkcmds.armv6
>>>  dist_project_lib_DATA += shared/startup/linkcmds.armv7m
>>>
>>>  EXTRA_DIST =
>>> diff --git a/c/src/lib/libbsp/arm/acinclude.m4
>>> b/c/src/lib/libbsp/arm/acinclude.m4
>>> index 9512b26..277c144 100644
>>> --- a/c/src/lib/libbsp/arm/acinclude.m4
>>> +++ b/c/src/lib/libbsp/arm/acinclude.m4
>>> @@ -30,6 +30,8 @@ AC_DEFUN([RTEMS_CHECK_BSPDIR],
>>>      AC_CONFIG_SUBDIRS([smdk2410]);;
>>>    stm32f4 )
>>>      AC_CONFIG_SUBDIRS([stm32f4]);;
>>> +  tiny6410 )
>>> +    AC_CONFIG_SUBDIRS([tiny6410]);;
>>>    *)
>>>      AC_MSG_ERROR([Invalid BSP]);;
>>>    esac
>>> diff --git a/c/src/lib/libbsp/arm/preinstall.am b/c/src/lib/libbsp/arm/
>>> preinstall.am
>>> index 3e66ebe..75e8dfa 100644
>>> --- a/c/src/lib/libbsp/arm/preinstall.am
>>> +++ b/c/src/lib/libbsp/arm/preinstall.am
>>> @@ -35,6 +35,10 @@ $(PROJECT_LIB)/linkcmds.armv4:
>>> shared/startup/linkcmds.armv4 $(PROJECT_LIB)/$(di
>>>         $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.armv4
>>>  PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.armv4
>>>
>>> +$(PROJECT_LIB)/linkcmds.armv6: shared/startup/linkcmds.armv6
>>> $(PROJECT_LIB)/$(dirstamp)
>>> +       $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.armv6
>>> +PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.armv6
>>> +
>>>  $(PROJECT_LIB)/linkcmds.armv7m: shared/startup/linkcmds.armv7m
>>> $(PROJECT_LIB)/$(dirstamp)
>>>         $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.armv7m
>>>  PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.armv7m
>>> diff --git a/c/src/lib/libbsp/arm/shared/startup/linkcmds.armv6
>>> b/c/src/lib/libbsp/arm/shared/startup/linkcmds.armv6
>>> new file mode 100644
>>> index 0000000..16fa3ef
>>> --- /dev/null
>>> +++ b/c/src/lib/libbsp/arm/shared/startup/linkcmds.armv6
>>> @@ -0,0 +1,26 @@
>>> +/**
>>> + * @file
>>> + *
>>> + * @ingroup bsp_linker
>>> + *
>>> + * @brief Linker command file for ARMv6 architecture.
>>> + */
>>> +
>>> +/*
>>> + * Copyright (c) 2010 embedded brains GmbH.  All rights reserved.
>>> + *
>>> + *  embedded brains GmbH
>>> + *  Obere Lagerstr. 30
>>> + *  82178 Puchheim
>>> + *  Germany
>>> + *  <rtems at embedded-brains.de>
>>> + *
>>> + * The license and distribution terms for this file may be
>>> + * found in the file LICENSE in this distribution or at
>>> + * http://www.rtems.com/license/LICENSE.
>>> + */
>>> +
>>> +bsp_stack_svc_size = DEFINED (bsp_stack_svc_size) ? bsp_stack_svc_size
>>> : 4096;
>>> +bsp_stack_svc_size = ALIGN (bsp_stack_svc_size, bsp_stack_align);
>>> +
>>> +INCLUDE linkcmds.base
>>> diff --git a/c/src/lib/libbsp/arm/tiny6410/Makefile.am
>>> b/c/src/lib/libbsp/arm/tiny6410/Makefile.am
>>> new file mode 100644
>>> index 0000000..e49dc3a
>>> --- /dev/null
>>> +++ b/c/src/lib/libbsp/arm/tiny6410/Makefile.am
>>> @@ -0,0 +1,62 @@
>>> +ACLOCAL_AMFLAGS = -I ../../../../aclocal
>>> +
>>> +include $(top_srcdir)/../../../../automake/compile.am
>>> +
>>> +include_bspdir = $(includedir)/bsp
>>> +
>>> +dist_project_lib_DATA = bsp_specs
>>> +
>>> +include_HEADERS = include/bsp.h
>>> +include_HEADERS += ../../shared/include/tm27.h
>>> +
>>> +include_bsp_HEADERS = ../shared/include/start.h
>>> +include_bsp_HEADERS += ../shared/include/linker-symbols.h
>>> +
>>> +nodist_include_HEADERS = include/bspopts.h
>>> +nodist_include_bsp_HEADERS = ../../shared/include/bootcard.h
>>> +DISTCLEANFILES = include/bspopts.h
>>> +
>>> +nodist_include_HEADERS += ../../shared/include/coverhd.h
>>> +
>>> +noinst_LIBRARIES = libbspstart.a
>>> +libbspstart_a_SOURCES = ../shared/start/start.S
>>> +#libbspstart_a_SOURCES = start/start.S
>>> +project_lib_DATA = start.$(OBJEXT)
>>> +
>>> +dist_project_lib_DATA += startup/linkcmds
>>> +
>>> +noinst_LIBRARIES += libbsp.a
>>> +libbsp_a_SOURCES =
>>> +
>>> +# startup
>>> +libbsp_a_SOURCES += ../shared/startup/bsp-start-memcpy.S
>>> +libbsp_a_SOURCES += ../../shared/bsplibc.c ../../shared/bsppost.c \
>>> +    ../../shared/bsppredriverhook.c ../../shared/bspgetworkarea.c \
>>> +    ../../shared/bsppretaskinghook.c startup/bspstart.c
>>> startup/bspidle.c \
>>> +    ../../shared/bspclean.c startup/bspreset.c \
>>> +    startup/memmap.c ../../shared/bootcard.c ../../shared/sbrk.c \
>>> +    ../../shared/gnatinstallhandler.c startup/bspstarthooks.c
>>> +# low-level debug
>>> +libbsp_a_SOURCES += debug/debug.c
>>> +# console
>>> +libbsp_a_SOURCES += console/uart.c ../../shared/console.c \
>>> +    ../../shared/console_select.c  ../../shared/console_control.c \
>>> +    ../../shared/console_read.c ../../shared/console_write.c
>>> +# IRQ
>>> +include_bsp_HEADERS += ../../shared/include/irq-generic.h \
>>> +       ../../shared/include/irq-info.h
>>> +libbsp_a_SOURCES += ../../shared/src/irq-default-handler.c
>>> +libbsp_a_SOURCES += ../../shared/src/irq-generic.c
>>> +libbsp_a_SOURCES += ../../shared/src/irq-info.c
>>> +libbsp_a_SOURCES += ../../shared/src/irq-legacy.c
>>> +libbsp_a_SOURCES += ../../shared/src/irq-server.c
>>> +libbsp_a_SOURCES += ../../shared/src/irq-shell.c
>>> +# abort
>>> +libbsp_a_SOURCES += ../shared/abort/abort.c
>>> +
>>> +libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/arm920.rel \
>>> +    ../../../libcpu/@RTEMS_CPU@/s3c64xx/clock.rel \
>>> +    ../../../libcpu/@RTEMS_CPU@/s3c64xx/irq.rel
>>> +
>>> +include $(srcdir)/preinstall.am
>>> +include $(top_srcdir)/../../../../automake/local.am
>>> diff --git a/c/src/lib/libbsp/arm/tiny6410/README
>>> b/c/src/lib/libbsp/arm/tiny6410/README
>>> new file mode 100644
>>> index 0000000..ae936e5
>>> --- /dev/null
>>> +++ b/c/src/lib/libbsp/arm/tiny6410/README
>>> @@ -0,0 +1,23 @@
>>> +This is the BSP for FriendlyARM tiny6410 board, a single board
>>> +computer using the Samsung S3C6410 SoC CPU.
>>> +S3C6410 is an arm1176jzf-s processor. About the mmu related,
>>> +still use the arm920 mmu management.This may be seperated,
>>> +for there may some difference between 920 and 1176jzf-s.
>>> +
>>> +Most of the hardware configuration is done in uboot.This maybe
>>> +migrated to rtems from uboot in future.
>>> +
>>> +Now only serial and timer is supported, other IP modules' driver
>>> +will be added in future.
>>> +
>>> +hello.exe ticker.exe nsecs.exe runs. Others have not been tested.
>>> +
>>> +How to use this bsp
>>> +1. When downloaded the source, first "bootstrap -c; bootstrap -p;
>>> +bootstrap"
>>> +2. Look at the sh-hello script to know how to configure for this bsp
>>> +4. use dnw to download the bin file to 0xC0104000
>>> +        MINI6410 # dnw 0xc0104000
>>> +        When finished download, use go command to run the bin file
>>> +        MINI6410 # go 0xc0104000
>>> +
>>> diff --git a/c/src/lib/libbsp/arm/tiny6410/bsp_specs
>>> b/c/src/lib/libbsp/arm/tiny6410/bsp_specs
>>> new file mode 100644
>>> index 0000000..082653a
>>> --- /dev/null
>>> +++ b/c/src/lib/libbsp/arm/tiny6410/bsp_specs
>>> @@ -0,0 +1,13 @@
>>> +%rename endfile old_endfile
>>> +%rename startfile old_startfile
>>> +%rename link old_link
>>> +
>>> +*startfile:
>>> +%{!qrtems: %(old_startfile)} \
>>> +%{!nostdlib: %{qrtems: start.o%s crti.o%s crtbegin.o%s -e _start}}
>>> +
>>> +*link:
>>> +%{!qrtems: %(old_link)} %{qrtems: -dc -dp -N}
>>> +
>>> +*endfile:
>>> +%{!qrtems: *(old_endfiles)} %{qrtems: crtend.o%s crtn.o%s }
>>> diff --git a/c/src/lib/libbsp/arm/tiny6410/configure.acb/c/src/lib/libbsp/arm/tiny6410/
>>> configure.ac
>>> new file mode 100644
>>> index 0000000..11966e0
>>> --- /dev/null
>>> +++ b/c/src/lib/libbsp/arm/tiny6410/configure.ac
>>> @@ -0,0 +1,23 @@
>>> +## Process this file with autoconf to produce a configure script.
>>> +
>>> +AC_PREREQ([2.69])
>>> +AC_INIT([rtems-c-src-lib-libbsp-arm-tiny6410],[_RTEMS_VERSION],[
>>> http://www.rtems.org/bugzilla])
>>> +AC_CONFIG_SRCDIR([bsp_specs])
>>> +RTEMS_TOP(../../../../../..)
>>> +
>>> +RTEMS_CANONICAL_TARGET_CPU
>>> +AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.12.2])
>>> +RTEMS_BSP_CONFIGURE
>>> +
>>> +RTEMS_PROG_CC_FOR_TARGET
>>> +RTEMS_CANONICALIZE_TOOLS
>>> +RTEMS_PROG_CCAS
>>> +
>>> +RTEMS_CHECK_NETWORKING
>>> +AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "yes")
>>> +
>>> +RTEMS_BSP_CLEANUP_OPTIONS(0, 1)
>>> +
>>> +# Explicitly list all Makefiles here
>>> +AC_CONFIG_FILES([Makefile])
>>> +AC_OUTPUT
>>> diff --git a/c/src/lib/libbsp/arm/tiny6410/console/uart.c
>>> b/c/src/lib/libbsp/arm/tiny6410/console/uart.c
>>> new file mode 100644
>>> index 0000000..46b5edb
>>> --- /dev/null
>>> +++ b/c/src/lib/libbsp/arm/tiny6410/console/uart.c
>>> @@ -0,0 +1,229 @@
>>> +/*
>>> + *  console driver for S3C2400 UARTs
>>> + *
>>> + *  This driver uses the shared console driver in
>>> + *  ...../libbsp/shared/console.c
>>> + *
>>> + *  If you want the driver to be interrupt driven, you
>>> + *  need to write the ISR, and in the ISR insert the
>>> + *  chars into termios's queue.
>>> + *
>>> + *  Copyright (c) 2004 Cogent Computer Systems
>>> + *  Written by Jay Monkman <jtm at lopingdog.com>
>>> + *
>>> + *  The license and distribution terms for this file may be
>>> + *  found in the file LICENSE in this distribution or at
>>> + *  http://www.rtems.com/license/LICENSE.
>>> + *
>>> + *
>>> + * 1. Modified from S3C2400    Peng Fan van.freenix at gmail.com
>>> +*/
>>> +#include <bsp.h>                /* Must be before libio.h */
>>> +#include <rtems/libio.h>
>>> +#include <termios.h>
>>> +#include <rtems/bspIo.h>
>>> +
>>> +/* Put the CPU (or UART) specific header file #include here */
>>> +#include <s3c64xx.h>
>>> +#include <libchip/serial.h>
>>> +#include <libchip/sersupp.h>
>>> +
>>> +/* How many serial ports? */
>>> +#define NUM_DEVS       1
>>> +
>>> +int     uart_poll_read(int minor);
>>> +
>>> +int dbg_dly;
>>> +
>>> +/* static function prototypes */
>>> +static int     uart_first_open(int major, int minor, void *arg);
>>> +static int     uart_last_close(int major, int minor, void *arg);
>>> +static int     uart_read(int minor);
>>> +static ssize_t uart_write(int minor, const char *buf, size_t len);
>>> +static void    uart_init(int minor);
>>> +static void    uart_write_polled(int minor, char c);
>>> +static int     uart_set_attributes(int minor, const struct termios *t);
>>> +
>>> +/* These are used by code in console.c */
>>> +unsigned long Console_Configuration_Count = NUM_DEVS;
>>> +
>>> +/* Pointers to functions for handling the UART. */
>>> +const console_fns uart_fns =
>>> +{
>>> +    libchip_serial_default_probe,
>>> +    uart_first_open,
>>> +    uart_last_close,
>>> +    uart_read,
>>> +    uart_write,
>>> +    uart_init,
>>> +    uart_write_polled,   /* not used in this driver */
>>> +    uart_set_attributes,
>>> +    FALSE      /* TRUE if interrupt driven, FALSE if not. */
>>> +};
>>> +
>>> +/*
>>> + * There's one item in array for each UART.
>>> + *
>>> + * Some of these fields are marked "NOT USED". They are not used
>>> + * by console.c, but may be used by drivers in libchip
>>> + *
>>> + */
>>> +console_tbl Console_Configuration_Ports[] = {
>>> +    {
>>> +        "/dev/com0",                      /* sDeviceName */
>>> +        SERIAL_CUSTOM,                    /* deviceType */
>>> +        &uart_fns,                        /* pDeviceFns */
>>> +        NULL,                             /* deviceProbe */
>>> +        NULL,                             /* pDeviceFlow */
>>> +        0,                                /* ulMargin - NOT USED */
>>> +        0,                                /* ulHysteresis - NOT USED */
>>> +        NULL,                             /* pDeviceParams */
>>> +        0,                                /* ulCtrlPort1  - NOT USED */
>>> +        0,                                /* ulCtrlPort2  - NOT USED */
>>> +        0,                                /* ulDataPort  - NOT USED */
>>> +        NULL,                             /* getRegister - NOT USED */
>>> +        NULL,                             /* setRegister - NOT USED */
>>> +        NULL,                             /* getData - NOT USED */
>>> +        NULL,                             /* setData - NOT USED */
>>> +        0,                                /* ulClock - NOT USED */
>>> +        0                                 /* ulIntVector - NOT USED */
>>> +    }
>>> +};
>>> +
>>> +/*********************************************************************/
>>> +/* Functions called via termios callbacks (i.e. the ones in uart_fns */
>>> +/*********************************************************************/
>>> +
>>> +/*
>>> + * This is called the first time each device is opened. If the driver
>>> + * is interrupt driven, you should enable interrupts here. Otherwise,
>>> + * it's probably safe to do nothing.
>>> + *
>>> + * Since micromonitor already set up the UART, we do nothing.
>>> + */
>>> +static int uart_first_open(int major, int minor, void *arg)
>>> +{
>>> +    return 0;
>>> +}
>>> +
>>> +
>>> +/*
>>> + * This is called the last time each device is closed. If the driver
>>> + * is interrupt driven, you should disable interrupts here. Otherwise,
>>> + * it's probably safe to do nothing.
>>> + */
>>> +static int uart_last_close(int major, int minor, void *arg)
>>> +{
>>> +    return 0;
>>> +}
>>> +
>>> +
>>> +/*
>>> + * Read one character from UART.
>>> + *
>>> + * Return -1 if there's no data, otherwise return
>>> + * the character in lowest 8 bits of returned int.
>>> + */
>>> +static int uart_read(int minor)
>>> +{
>>> +    char c;
>>> +
>>> +    if (minor == 0) {
>>> +        if (rUTRSTAT0 & 0x1) {
>>> +            c = rURXH0 & 0xff;
>>> +            return c;
>>> +        } else {
>>> +            return -1;
>>> +        }
>>> +    } else {
>>> +        printk("Unknown console minor number: %d\n", minor);
>>> +        return -1;
>>> +    }
>>> +
>>> +}
>>> +
>>> +
>>> +/*
>>> + * Write buffer to UART
>>> + *
>>> + * return 1 on success, -1 on error
>>> + */
>>> +static ssize_t uart_write(int minor, const char *buf, size_t len)
>>> +{
>>> +    int i;
>>> +
>>> +    if (minor == 0) {
>>> +        for (i = 0; i < len; i++) {
>>> +            /* Wait for fifo to have room */
>>> +            while(!(rUTRSTAT0 & 0x2)) {
>>> +                continue;
>>> +            }
>>> +
>>> +           rUTXH0 = (char) buf[i];
>>> +        }
>>> +    } else {
>>> +        printk("Unknown console minor number: %d\n", minor);
>>> +        return -1;
>>> +    }
>>> +
>>> +    return 1;
>>> +}
>>> +
>>> +
>>> +/* Set up the UART. */
>>> +static void uart_init(int minor)
>>> +{
>>> +       int i;
>>> +       unsigned int reg = 0;
>>> +       /* Migrate the configuration from uboot in future */
>>> +       Uart_SendString(__func__);
>>> +}
>>> +
>>> +/* I'm not sure this is needed for the shared console driver. */
>>> +static void    uart_write_polled(int minor, char c)
>>> +{
>>> +    uart_write(minor, &c, 1);
>>> +}
>>> +
>>> +/* This is for setting baud rate, bits, etc. */
>>> +static int     uart_set_attributes(int minor, const struct termios *t)
>>> +{
>>> +    return 0;
>>> +}
>>> +
>>>
>>> +/***********************************************************************/
>>> +/*
>>> + * The following functions are not used by TERMIOS, but other RTEMS
>>> + * functions use them instead.
>>> + */
>>>
>>> +/***********************************************************************/
>>> +/*
>>> + * Read from UART. This is used in the exit code, and can't
>>> + * rely on interrupts.
>>> +*/
>>> +int uart_poll_read(int minor)
>>> +{
>>> +    return uart_read(minor);
>>> +}
>>> +
>>> +
>>> +/*
>>> + * Write a character to the console. This is used by printk() and
>>> + * maybe other low level functions. It should not use interrupts or any
>>> + * RTEMS system calls. It needs to be very simple
>>> + */
>>> +static void _BSP_put_char( char c ) {
>>> +    uart_write_polled(0, c);
>>> +    if (c == '\n') {
>>> +        uart_write_polled(0, '\r');
>>> +    }
>>> +}
>>> +
>>> +BSP_output_char_function_type BSP_output_char = _BSP_put_char;
>>> +
>>> +static int _BSP_get_char(void)
>>> +{
>>> +  return uart_poll_read(0);
>>> +}
>>> +
>>> +BSP_polling_getchar_function_type BSP_poll_char = _BSP_get_char;
>>> diff --git a/c/src/lib/libbsp/arm/tiny6410/debug/debug.c
>>> b/c/src/lib/libbsp/arm/tiny6410/debug/debug.c
>>> new file mode 100644
>>> index 0000000..139b21e
>>> --- /dev/null
>>> +++ b/c/src/lib/libbsp/arm/tiny6410/debug/debug.c
>>> @@ -0,0 +1,60 @@
>>> +/**
>>> + * @file
>>> + *
>>> + * @ingroup s3c64xx
>>> + *
>>> + * @brief Low level Debug code.
>>> + */
>>> +
>>> +/*
>>> + *
>>> + * The license and distribution terms for this file may be
>>> + * found in the file LICENSE in this distribution or at
>>> + * http://www.rtems.com/license/LICENSE.
>>> + *
>>> + */
>>> +
>>> +#include <bsp.h>
>>> +#include <s3c64xx.h>
>>> +void debug_led(uint32_t val)
>>> +{
>>> +       uint32_t *addr = (uint32_t *)0x7f008800;
>>> +       *addr = val;
>>> +}
>>> +
>>> +
>>> +static void Delay(void)
>>> +{
>>> +    volatile int i;
>>> +
>>> +    for(i=0 ; i < 1000 ; i++)
>>> +    {
>>> +    }
>>> +}
>>> +void Uart_SendByte(int data)
>>> +{
>>> +    while(!(rUTRSTAT0 & 0x2));   //Wait until THR is empty.
>>> +    Delay();
>>> +    rUTXH0 = (unsigned char)data;
>>> +}
>>> +
>>> +void Uart_SendString(char *pt)
>>> +{
>>> +    while(*pt)
>>> +        Uart_SendByte(*pt++);
>>> +    Uart_SendByte('\r');
>>> +    Uart_SendByte('\n');
>>> +}
>>> +void printhex(unsigned int data)
>>> +{
>>> +       int i = 0,a = 0;
>>> +       for (i = 0; i < 8; i++) {
>>> +               a = (data>>(32-(i+1)*4))&0xf;
>>> +               if (((a<=9)&&(a>=0)))
>>> +                       Uart_SendByte(a + 0x30);
>>> +               else if ((a <= 0xf) && (a >= 0xa))
>>> +                       Uart_SendByte(a-0xa+0x61);
>>> +       }
>>> +       Uart_SendByte('\r');
>>> +       Uart_SendByte('\n');
>>> +}
>>> diff --git a/c/src/lib/libbsp/arm/tiny6410/include/bsp.h
>>> b/c/src/lib/libbsp/arm/tiny6410/include/bsp.h
>>> new file mode 100644
>>> index 0000000..699fdab
>>> --- /dev/null
>>> +++ b/c/src/lib/libbsp/arm/tiny6410/include/bsp.h
>>> @@ -0,0 +1,60 @@
>>> +/**
>>> + *  @file
>>> + *
>>> + *  This include file contains definitions related to the GP32 BSP.
>>> + */
>>> +
>>> +/*
>>> + *  Copyright (c) 2013
>>> + *  ASIC Engineering Center
>>> + *  Nanjing, China
>>> + *  <van.freenix at gmail.com>
>>> + *
>>> + *  The license and distribution terms for this file may be
>>> + *  found in the file LICENSE in this distribution or at
>>> + *  http://www.rtems.com/license/LICENSE.
>>> + */
>>> +
>>> +#ifndef _BSP_H
>>> +#define _BSP_H
>>> +
>>> +#ifdef __cplusplus
>>> +extern "C" {
>>> +#endif
>>> +
>>> +#include <bspopts.h>
>>> +#include <bsp/default-initial-extension.h>
>>> +
>>> +#include <rtems.h>
>>> +#include <rtems/iosupp.h>
>>> +#include <rtems/console.h>
>>> +#include <rtems/clockdrv.h>
>>> +#include <s3c64xx.h>
>>> +
>>> +#define BSP_FEATURE_IRQ_EXTENSION
>>> +
>>> +
>>> +/*functions to get the differents s3c2400 clks*/
>>> +uint32_t get_FCLK(void);
>>> +uint32_t get_HCLK(void);
>>> +uint32_t get_PCLK(void);
>>> +uint32_t get_UCLK(void);
>>> +
>>> +
>>> +
>>> +
>>> +/*
>>> + *  This BSP provides its own IDLE thread to override the RTEMS one.
>>> + *  So we prototype it and define the constant confdefs.h expects
>>> + *  to configure a BSP specific one.
>>> + */
>>> +void *bsp_idle_thread(uintptr_t ignored);
>>> +
>>> +#define BSP_IDLE_TASK_BODY bsp_idle_thread
>>> +
>>> +#ifdef __cplusplus
>>> +}
>>> +#endif
>>> +
>>> +#endif /* _BSP_H */
>>> +
>>> diff --git a/c/src/lib/libbsp/arm/tiny6410/make/custom/tiny6410.cfg
>>> b/c/src/lib/libbsp/arm/tiny6410/make/custom/tiny6410.cfg
>>> new file mode 100644
>>> index 0000000..44b0ca6
>>> --- /dev/null
>>> +++ b/c/src/lib/libbsp/arm/tiny6410/make/custom/tiny6410.cfg
>>> @@ -0,0 +1,21 @@
>>> +#
>>> +#  Config file for ARM S3C6410
>>> +#
>>> +
>>> +include $(RTEMS_ROOT)/make/custom/default.cfg
>>> +
>>> +RTEMS_CPU=arm
>>> +RTEMS_CPU_MODEL=s3c6410
>>> +
>>> +#  This contains the compiler options necessary to select the CPU model
>>> +#  and (hopefully) optimize for it.
>>> +#
>>> +CPU_CFLAGS = -mstructure-size-boundary=32 -mcpu=arm1176jzf-s -mfpu=vfp
>>> -mfloat-abi=soft -DCPU_S3C6410
>>> +
>>> +# optimize flag: typically -O2
>>> +CFLAGS_OPTIMIZE_V = -O2 -g
>>> +
>>> +define bsp-post-link
>>> +       $(OBJCOPY) -O binary $(basename $@).exe $(basename $@)$(DOWNEXT)
>>> +       $(default-bsp-post-link)
>>> +endef
>>> diff --git a/c/src/lib/libbsp/arm/tiny6410/preinstall.amb/c/src/lib/libbsp/arm/tiny6410/
>>> preinstall.am
>>> new file mode 100644
>>> index 0000000..ca20008
>>> --- /dev/null
>>> +++ b/c/src/lib/libbsp/arm/tiny6410/preinstall.am
>>> @@ -0,0 +1,83 @@
>>> +## Automatically generated by ampolish3 - Do not edit
>>> +
>>> +if AMPOLISH3
>>> +$(srcdir)/preinstall.am: Makefile.am
>>> +       $(AMPOLISH3) $(srcdir)/Makefile.am > $(srcdir)/preinstall.am
>>> +endif
>>> +
>>> +PREINSTALL_DIRS =
>>> +DISTCLEANFILES += $(PREINSTALL_DIRS)
>>> +
>>> +all-local: $(TMPINSTALL_FILES)
>>> +
>>> +TMPINSTALL_FILES =
>>> +CLEANFILES = $(TMPINSTALL_FILES)
>>> +
>>> +all-am: $(PREINSTALL_FILES)
>>> +
>>> +PREINSTALL_FILES =
>>> +CLEANFILES += $(PREINSTALL_FILES)
>>> +
>>> +$(PROJECT_LIB)/$(dirstamp):
>>> +       @$(MKDIR_P) $(PROJECT_LIB)
>>> +       @: > $(PROJECT_LIB)/$(dirstamp)
>>> +PREINSTALL_DIRS += $(PROJECT_LIB)/$(dirstamp)
>>> +
>>> +$(PROJECT_INCLUDE)/$(dirstamp):
>>> +       @$(MKDIR_P) $(PROJECT_INCLUDE)
>>> +       @: > $(PROJECT_INCLUDE)/$(dirstamp)
>>> +PREINSTALL_DIRS += $(PROJECT_INCLUDE)/$(dirstamp)
>>> +
>>> +$(PROJECT_INCLUDE)/bsp/$(dirstamp):
>>> +       @$(MKDIR_P) $(PROJECT_INCLUDE)/bsp
>>> +       @: > $(PROJECT_INCLUDE)/bsp/$(dirstamp)
>>> +PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp)
>>> +
>>> +$(PROJECT_LIB)/bsp_specs: bsp_specs $(PROJECT_LIB)/$(dirstamp)
>>> +       $(INSTALL_DATA) $< $(PROJECT_LIB)/bsp_specs
>>> +PREINSTALL_FILES += $(PROJECT_LIB)/bsp_specs
>>> +
>>> +$(PROJECT_INCLUDE)/bsp.h: include/bsp.h $(PROJECT_INCLUDE)/$(dirstamp)
>>> +       $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp.h
>>> +PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp.h
>>> +
>>> +$(PROJECT_INCLUDE)/tm27.h: ../../shared/include/tm27.h
>>> $(PROJECT_INCLUDE)/$(dirstamp)
>>> +       $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h
>>> +PREINSTALL_FILES += $(PROJECT_INCLUDE)/tm27.h
>>> +
>>> +$(PROJECT_INCLUDE)/bsp/start.h: ../shared/include/start.h
>>> $(PROJECT_INCLUDE)/bsp/$(dirstamp)
>>> +       $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/start.h
>>> +PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/start.h
>>> +
>>> +$(PROJECT_INCLUDE)/bsp/linker-symbols.h:
>>> ../shared/include/linker-symbols.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
>>> +       $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/linker-symbols.h
>>> +PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/linker-symbols.h
>>> +
>>> +$(PROJECT_INCLUDE)/bspopts.h: include/bspopts.h
>>> $(PROJECT_INCLUDE)/$(dirstamp)
>>> +       $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bspopts.h
>>> +PREINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h
>>> +
>>> +$(PROJECT_INCLUDE)/bsp/bootcard.h: ../../shared/include/bootcard.h
>>> $(PROJECT_INCLUDE)/bsp/$(dirstamp)
>>> +       $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bootcard.h
>>> +PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bootcard.h
>>> +
>>> +$(PROJECT_INCLUDE)/coverhd.h: ../../shared/include/coverhd.h
>>> $(PROJECT_INCLUDE)/$(dirstamp)
>>> +       $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/coverhd.h
>>> +PREINSTALL_FILES += $(PROJECT_INCLUDE)/coverhd.h
>>> +
>>> +$(PROJECT_LIB)/start.$(OBJEXT): start.$(OBJEXT)
>>> $(PROJECT_LIB)/$(dirstamp)
>>> +       $(INSTALL_DATA) $< $(PROJECT_LIB)/start.$(OBJEXT)
>>> +TMPINSTALL_FILES += $(PROJECT_LIB)/start.$(OBJEXT)
>>> +
>>> +$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp)
>>> +       $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds
>>> +PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds
>>> +
>>> +$(PROJECT_INCLUDE)/bsp/irq-generic.h:
>>> ../../shared/include/irq-generic.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
>>> +       $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-generic.h
>>> +PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-generic.h
>>> +
>>> +$(PROJECT_INCLUDE)/bsp/irq-info.h: ../../shared/include/irq-info.h
>>> $(PROJECT_INCLUDE)/bsp/$(dirstamp)
>>> +       $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-info.h
>>> +PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-info.h
>>> +
>>> diff --git a/c/src/lib/libbsp/arm/tiny6410/sh-hello
>>> b/c/src/lib/libbsp/arm/tiny6410/sh-hello
>>> new file mode 100755
>>> index 0000000..2ca81d6
>>> --- /dev/null
>>> +++ b/c/src/lib/libbsp/arm/tiny6410/sh-hello
>>> @@ -0,0 +1,13 @@
>>> +#!/bin/sh
>>> +mkdir build
>>> +cd build
>>> +../rtems/configure --target=arm-rtemseabi4.11
>>> --enable-rtemsbsp="tiny6410" --enable-test=samples --disable-posix
>>> +rm `find . -name hello.exe`
>>> +gmake all
>>> +rm hello.*
>>> +rm init.*
>>> +cp  -f `find . -name hello.exe` .
>>> +cp arm-rtemseabi4.11/c/tiny6410/testsuites/samples/hello/init.o .
>>> +arm-rtemseabi4.11-objcopy -O binary -S hello.exe hello.bin
>>> +arm-rtemseabi4.11-objdump -D hello.exe > hello.s
>>> +arm-rtemseabi4.11-objdump -D init.o > init.s
>>> diff --git a/c/src/lib/libbsp/arm/tiny6410/startup/bspidle.c
>>> b/c/src/lib/libbsp/arm/tiny6410/startup/bspidle.c
>>> new file mode 100644
>>> index 0000000..6bc8088
>>> --- /dev/null
>>> +++ b/c/src/lib/libbsp/arm/tiny6410/startup/bspidle.c
>>> @@ -0,0 +1,25 @@
>>> +/*
>>> + *  BSP specific Idle thread
>>> + */
>>> +
>>> +/*
>>> + *  Copyright (c) 2000 Canon Research Centre France SA.
>>> + *  Emmanuel Raguet, mailto:raguet at crf.canon.fr
>>> + *
>>> + *  The license and distribution terms for this file may be
>>> + *  found in the file LICENSE in this distribution or at
>>> + *  http://www.rtems.com/license/LICENSE.
>>> + *
>>> + *  1.Copied from gp32
>>> + */
>>> +
>>> +#include <bsp.h>
>>> +
>>> +void *bsp_idle_thread(uintptr_t ignored)
>>> +{
>>> +  while(1) {
>>> +    __asm__ volatile ("MCR p15,0,r0,c7,c0,4     \n");
>>> +  }
>>> +  return NULL;
>>> +}
>>> +
>>> diff --git a/c/src/lib/libbsp/arm/tiny6410/startup/bspreset.c
>>> b/c/src/lib/libbsp/arm/tiny6410/startup/bspreset.c
>>> new file mode 100644
>>> index 0000000..0d52df7
>>> --- /dev/null
>>> +++ b/c/src/lib/libbsp/arm/tiny6410/startup/bspreset.c
>>> @@ -0,0 +1,37 @@
>>> +/*
>>> + *  The license and distribution terms for this file may be
>>> + *  found in the file LICENSE in this distribution or at
>>> + *  http://www.rtems.com/license/LICENSE.
>>> + *  1. Copied from gp32
>>> + */
>>> +
>>> +#include <bsp.h>
>>> +
>>> +void bsp_reset(void)
>>> +{
>>> +  rtems_interrupt_level level;
>>> +  rtems_interrupt_disable(level);
>>> +  /* disable mmu, invalide i-cache and call swi #4 */
>>> +  __asm__ volatile(""
>>> +    "mrc    p15,0,r0,c1,c0,0  \n"
>>> +    "bic    r0,r0,#1          \n"
>>> +    "mcr    p15,0,r0,c1,c0,0  \n"
>>> +    "nop                      \n"
>>> +    "nop                      \n"
>>> +    "nop                      \n"
>>> +    "nop                      \n"
>>> +    "nop                      \n"
>>> +    "mov    r0,#0             \n"
>>> +    "MCR    p15,0,r0,c7,c5,0  \n"
>>> +    "nop                      \n"
>>> +    "nop                      \n"
>>> +    "nop                      \n"
>>> +    "nop                      \n"
>>> +    "nop                      \n"
>>> +    "swi    #4                "
>>> +    :
>>> +    :
>>> +    : "r0"
>>> +  );
>>> +  /* we should be back in bios now */
>>> +}
>>> diff --git a/c/src/lib/libbsp/arm/tiny6410/startup/bspstart.c
>>> b/c/src/lib/libbsp/arm/tiny6410/startup/bspstart.c
>>> new file mode 100644
>>> index 0000000..09eded1
>>> --- /dev/null
>>> +++ b/c/src/lib/libbsp/arm/tiny6410/startup/bspstart.c
>>> @@ -0,0 +1,83 @@
>>> +/*
>>> + * This file contains the ARM BSP startup package. It includes
>>> application,
>>> + * board, and monitor specific initialization and configuration. The
>>> generic CPU
>>> + * dependent initialization has been performed before this routine is
>>> invoked.
>>> + */
>>> +
>>> +/*
>>> + *  Copyright (c) 2000 Canon Research Centre France SA.
>>> + *  Emmanuel Raguet, mailto:raguet at crf.canon.fr
>>> + *
>>> + *  The license and distribution terms for this file may be
>>> + *  found in the file LICENSE in this distribution or at
>>> + *  http://www.rtems.com/license/LICENSE.
>>> + *
>>> + *  1. Modified from gp32      Peng Fan van.freenix at gmail.com
>>> + */
>>> +
>>> +#include <bsp.h>
>>> +#include <bsp/irq-generic.h>
>>> +#include <rtems/bspIo.h>
>>> +#include <s3c64xx.h>
>>> +
>>> +/*
>>> + * External Prototypes
>>> + */
>>> +extern void rtems_exception_init_mngt(void);
>>> +
>>> +/*
>>> + *  BSP Specific Initialization in C
>>> + */
>>> +void bsp_start_default( void )
>>> +{
>>> +  uint32_t cr;
>>> +  uint32_t pend,last;
>>> +  uint32_t REFCNT;
>>> +  uint32_t i;
>>> +
>>> +  /* stop RTC */
>>> +  rTICCNT = 0x0;
>>> +
>>> +  /* stop watchdog,ADC and timers */
>>> +  rWTCON = 0x0;
>>> +  rTCON = 0x0;
>>> +  rADCCON = 0x0;
>>> +
>>> +  /* disable interrupts */
>>> +  rVIC0_INTENCLEAR = 0x0;
>>> +  rVIC1_INTENCLEAR = 0x0;
>>> +  /* interrupt select, irq or fiq?*/
>>> +  rVIC0_INTSELECT = 0x0;
>>> +  rVIC1_INTSELECT = 0x0;
>>> +
>>> +  /* clear external interrupt pending*/
>>> +  rEINT0PEND = ~0x0; /* write 1 to clear */
>>> +
>>> +  /* clear pending interrupt */
>>> +  rVIC0_ADDRESS = 0x0;
>>> +  rVIC1_ADDRESS = 0x0;
>>> +
>>> +
>>> +#if 0
>>> +  /* system clock may be migrated to here from uboot */
>>> +  /* setup clocks */
>>> +#endif
>>> +
>>> +  Uart_SendString(__func__);
>>> +  /*
>>> +   * Init rtems exceptions management
>>> +   */
>>> +  rtems_exception_init_mngt();
>>> +
>>> +  /*
>>> +   * Init rtems interrupt management
>>> +   */
>>> +  bsp_interrupt_initialize();
>>> +}
>>> +
>>> +/*
>>> + *  By making this a weak alias for bsp_start_default, a brave soul
>>> + *  can override the actual bsp_start routine used.
>>> + */
>>> +
>>> +void bsp_start (void) __attribute__ ((weak,
>>> alias("bsp_start_default")));
>>> diff --git a/c/src/lib/libbsp/arm/tiny6410/startup/bspstarthooks.c
>>> b/c/src/lib/libbsp/arm/tiny6410/startup/bspstarthooks.c
>>> new file mode 100644
>>> index 0000000..31e359c
>>> --- /dev/null
>>> +++ b/c/src/lib/libbsp/arm/tiny6410/startup/bspstarthooks.c
>>> @@ -0,0 +1,146 @@
>>> +/**
>>> + * @file
>>> + *
>>> + * @ingroup s3c64xx
>>> + *
>>> + * @brief Startup code.
>>> + */
>>> +
>>> +/*
>>> + * Copyright (c) 2009-2011 embedded brains GmbH.  All rights reserved.
>>> + *
>>> + *  embedded brains GmbH
>>> + *  Obere Lagerstr. 30
>>> + *  82178 Puchheim
>>> + *  Germany
>>> + *  <rtems at embedded-brains.de>
>>> + *
>>> + * The license and distribution terms for this file may be
>>> + * found in the file LICENSE in this distribution or at
>>> + * http://www.rtems.com/license/LICENSE.
>>> + *
>>> + * 1. Modified from lpc32xx    Peng Fan        van.freenix at gmail.com
>>> + */
>>> +
>>> +#include <bsp.h>
>>> +#include <bsp/start.h>
>>> +#include <bsp/irq.h>
>>> +#include <bsp/linker-symbols.h>
>>> +#include <libcpu/arm-cp15.h>
>>> +#include <libcpu/mmu.h>
>>> +//#include <bsp/uart-output-char.h> //fanpeng
>>> +
>>> +#include <s3c64xx.h>
>>> +
>>> +extern void bsp_reset(void);
>>> +
>>> +
>>> +void SWI_Handler(void)
>>> +{
>>> +       Uart_SendString("swi handler");
>>> +       while(1);
>>> +}
>>> +static BSP_START_TEXT_SECTION void clear_bss(void)
>>> +{
>>> +  const int *end = (const int *) bsp_section_bss_end;
>>> +  int *out = (int *) bsp_section_bss_begin;
>>> +
>>> +  /* Clear BSS */
>>> +  while (out != end) {
>>> +    *out = 0;
>>> +    ++out;
>>> +  }
>>> +}
>>> +
>>> +extern mmu_sect_map_t mem_map[];
>>> +static BSP_START_TEXT_SECTION void setup_mmu_and_cache(void)
>>> +{
>>> +  uint32_t ctrl = 0;
>>> +
>>> +  /* Disable MMU and cache, basic settings */
>>> +  ctrl = arm_cp15_get_control();
>>> +  ctrl &= ~(ARM_CP15_CTRL_I | ARM_CP15_CTRL_R | ARM_CP15_CTRL_C
>>> +    | ARM_CP15_CTRL_V | ARM_CP15_CTRL_M);
>>> +  ctrl |=  ARM_CP15_CTRL_A;
>>> +  arm_cp15_set_control(ctrl);
>>> +
>>> +  arm_cp15_data_cache_clean_and_invalidate();
>>> +  arm_cp15_cache_invalidate(); //cache clean and invalidate ??
>>> +  arm_cp15_tlb_invalidate();
>>> +
>>> +  #ifndef S3C64XX_DISABLE_MMU
>>> +    mmu_init(mem_map);
>>> +  #endif
>>> +}
>>> +
>>> +static BSP_START_TEXT_SECTION void setup_pll(void)
>>> +{
>>> +}
>>> +
>>> +BSP_START_TEXT_SECTION void bsp_start_hook_0(void)
>>> +{
>>> +  setup_pll();
>>> +  setup_mmu_and_cache();
>>> +}
>>> +
>>> +static BSP_START_TEXT_SECTION void stop_dma_activities(void)
>>> +{
>>> +}
>>> +
>>> +static BSP_START_TEXT_SECTION void setup_uarts(void)
>>> +{
>>> +}
>>> +
>>> +static BSP_START_TEXT_SECTION void setup_timer(void)
>>> +{
>>> +       /* May be removed */
>>> +}
>>> +
>>> +/* vector_begin will be copied to address 0 */
>>> +uint32_t vector_begin[] = {
>>> +       0xe59ff018, //ldr     pc, [pc, #24]
>>> +       0xe59ff018,
>>> +       0xe59ff018,
>>> +       0xe59ff018,
>>> +       0xe59ff018,
>>> +       0xe320f000, //nop
>>> +       0xe59ff018,
>>> +       0xe59ff018,
>>> +
>>> +       /***************/
>>> +       bsp_reset,
>>> +       0xe320f000, //nop
>>> +       0xe320f000, //nop
>>> +       0xe320f000, //nop
>>> +       0xe320f000, //nop
>>> +       0xe320f000, //nop
>>> +       0xe320f000, //nop
>>> +       0xe320f000, //nop
>>> +};
>>> +
>>> +BSP_START_TEXT_SECTION void bsp_start_hook_1(void)
>>> +{
>>> +  int i = 0;
>>> +  stop_dma_activities();
>>> +  setup_uarts();
>>> +  setup_timer();
>>> +
>>> +  arm_cp15_data_cache_clean_and_invalidate();
>>> +  arm_cp15_cache_invalidate(); //??
>>> +
>>> +  /* Copy vector table to address 0*/
>>> +  bsp_start_memcpy(
>>> +         (int *)0,
>>> +         (const int*)vector_begin,
>>> +         (size_t)64
>>> +  );
>>> +
>>> +  /* VIC is not enabled for this vector interrupt processor,
>>> +   * This may be done in the future to use vector interrupt.
>>> +   */
>>> +
>>> +  /* Clear .bss section */
>>> +  clear_bss();
>>> +
>>> +  /* At this point we can use objects outside the .start section */
>>> +}
>>> diff --git a/c/src/lib/libbsp/arm/tiny6410/startup/linkcmds
>>> b/c/src/lib/libbsp/arm/tiny6410/startup/linkcmds
>>> new file mode 100644
>>> index 0000000..dc48a57
>>> --- /dev/null
>>> +++ b/c/src/lib/libbsp/arm/tiny6410/startup/linkcmds
>>> @@ -0,0 +1,25 @@
>>> +MEMORY {
>>> +       SDRAM_INTERRUPT : ORIGIN = 0x50000000, LENGTH = 4k
>>> +       SDRAM_MMU : ORIGIN = 0x50100000, LENGTH = 16k
>>> +       SDRAM : ORIGIN = 0x50104000, LENGTH = 128M - 1M - 16k
>>> +}
>>> +
>>> +REGION_ALIAS ("REGION_START", SDRAM);
>>> +REGION_ALIAS ("REGION_VECTOR", SDRAM);
>>> +REGION_ALIAS ("REGION_TEXT", SDRAM);
>>> +REGION_ALIAS ("REGION_TEXT_LOAD", SDRAM);
>>> +REGION_ALIAS ("REGION_RODATA", SDRAM);
>>> +REGION_ALIAS ("REGION_RODATA_LOAD", SDRAM);
>>> +REGION_ALIAS ("REGION_DATA", SDRAM);
>>> +REGION_ALIAS ("REGION_DATA_LOAD", SDRAM);
>>> +REGION_ALIAS ("REGION_FAST_TEXT", SDRAM);
>>> +REGION_ALIAS ("REGION_FAST_TEXT_LOAD", SDRAM);
>>> +REGION_ALIAS ("REGION_FAST_DATA", SDRAM);
>>> +REGION_ALIAS ("REGION_FAST_DATA_LOAD", SDRAM);
>>> +REGION_ALIAS ("REGION_BSS", SDRAM);
>>> +REGION_ALIAS ("REGION_WORK", SDRAM);
>>> +REGION_ALIAS ("REGION_STACK", SDRAM);
>>> +
>>> +_ttbl_base = ORIGIN (SDRAM_MMU);
>>> +
>>> +INCLUDE linkcmds.armv6
>>> diff --git a/c/src/lib/libbsp/arm/tiny6410/startup/memmap.c
>>> b/c/src/lib/libbsp/arm/tiny6410/startup/memmap.c
>>> new file mode 100644
>>> index 0000000..aa0b7f9
>>> --- /dev/null
>>> +++ b/c/src/lib/libbsp/arm/tiny6410/startup/memmap.c
>>> @@ -0,0 +1,29 @@
>>> +/*
>>> + *  s3c6410 Memory Map
>>> + *
>>> + *  Copyright (c) 2004 by Cogent Computer Systems
>>> + *  Written by Jay Monkman <jtm at lopingdog.com>
>>> + *
>>> + *  The license and distribution terms for this file may be
>>> + *  found in the file LICENSE in this distribution or at
>>> + *  http://www.rtems.com/license/LICENSE.
>>> + *
>>> + *  1. Modified from gp32      Peng Fan van.freenix at gmail.com
>>> + */
>>> +#include <rtems.h>
>>> +#include <libcpu/mmu.h>
>>> +
>>> +/*ARM1176jzf-s consider TLB related*/
>>> +/*Here not implement 2-level page table considering tlb miss
>>> +  Maybe a tlb management structure should be implemented.
>>> +       To real time task, TLB entry is locked and should not incur
>>> +       TLB miss. But to non real time task, TLB miss is not cared
>>> +       Not sure about this. May have a try to do this in future
>>> +*/
>>> +mmu_sect_map_t mem_map[] = {
>>> +/*  <phys addr>  <virt addr> <size> <flags> */
>>> +    {0x00000000, 0x00000000, 4096, MMU_CACHE_NONE},
>>> +    {0x50000000, 0x00000000, 1, MMU_CACHE_NONE},
>>> +    {0x50000000, 0x50000000, 128, MMU_CACHE_NONE},
>>> +    {0x00000000, 0x00000000,   0,    0}                   /* The end */
>>> +};
>>> diff --git a/c/src/lib/libcpu/arm/Makefile.am
>>> b/c/src/lib/libcpu/arm/Makefile.am
>>> index e488c45..e978910 100644
>>> --- a/c/src/lib/libcpu/arm/Makefile.am
>>> +++ b/c/src/lib/libcpu/arm/Makefile.am
>>> @@ -157,6 +157,31 @@ s3c24xx_irq_rel_CPPFLAGS = $(AM_CPPFLAGS)
>>>  s3c24xx_irq_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
>>>  endif
>>>
>>> +if s3c64xx
>>> +include_HEADERS = s3c64xx/include/s3c64xx.h s3c64xx/include/s3c6410.h
>>> +
>>> +## s3c64xx/clock
>>> +noinst_PROGRAMS += s3c64xx/clock.rel
>>> +s3c64xx_clock_rel_SOURCES = s3c64xx/clock/clockdrv.c
>>> s3c64xx/clock/support.c
>>> +s3c64xx_clock_rel_CPPFLAGS = $(AM_CPPFLAGS)
>>> +s3c64xx_clock_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
>>> +
>>> +## s3c64xx/timer
>>> +#noinst_PROGRAMS += s3c64xx/timer.rel
>>> +#s3c64xx_timer_rel_SOURCES = s3c64xx/timer/timer.c
>>> +#s3c64xx_timer_rel_CPPFLAGS = $(AM_CPPFLAGS)
>>> +#s3c64xx_timer_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
>>> +
>>> +## s3c64xx/interrupt
>>> +include_bsp_HEADERS += s3c64xx/irq/irq.h
>>> +
>>> +noinst_PROGRAMS += s3c64xx/irq.rel
>>> +s3c64xx_irq_rel_SOURCES = s3c64xx/irq/irq.c \
>>> +    s3c64xx/irq/irq.h
>>> +s3c64xx_irq_rel_CPPFLAGS = $(AM_CPPFLAGS)
>>> +s3c64xx_irq_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
>>> +endif
>>> +
>>>  if lpc22xx
>>>  include_HEADERS = lpc22xx/include/lpc22xx.h
>>>
>>> diff --git a/c/src/lib/libcpu/arm/configure.ac b/c/src/lib/libcpu/arm/
>>> configure.ac
>>> index ae0967b..4f3ebea 100644
>>> --- a/c/src/lib/libcpu/arm/configure.ac
>>> +++ b/c/src/lib/libcpu/arm/configure.ac
>>> @@ -23,6 +23,7 @@ AM_CONDITIONAL(shared, test "$RTEMS_CPU_MODEL" =
>>> "at91rm9200" || \
>>>                        test "$RTEMS_CPU_MODEL" = "mc9328mxl" || \
>>>                        test "$RTEMS_CPU_MODEL" = "s3c2410" || \
>>>                        test "$RTEMS_CPU_MODEL" = "s3c2400" || \
>>> +                      test "$RTEMS_CPU_MODEL" = "s3c6410" || \
>>>                        test "$RTEMS_CPU_MODEL" = "pxa255")
>>>
>>>  AM_CONDITIONAL(at91rm9200, test "$RTEMS_CPU_MODEL" = "at91rm9200")
>>> @@ -31,6 +32,7 @@ AM_CONDITIONAL(lpc22xx, test "$RTEMS_CPU_MODEL" =
>>> "lpc22xx")
>>>  AM_CONDITIONAL(pxa255, test "$RTEMS_CPU_MODEL" = "pxa255")
>>>  AM_CONDITIONAL(s3c24xx, test "$RTEMS_CPU_MODEL" = "s3c2400" ||\
>>>                          test "$RTEMS_CPU_MODEL" = "s3c2410")
>>> +AM_CONDITIONAL(s3c64xx, test "$RTEMS_CPU_MODEL" = "s3c6410")
>>>
>>>  RTEMS_AMPOLISH3
>>>
>>> diff --git a/c/src/lib/libcpu/arm/preinstall.am b/c/src/lib/libcpu/arm/
>>> preinstall.am
>>> index 751a085..0a8109c 100644
>>> --- a/c/src/lib/libcpu/arm/preinstall.am
>>> +++ b/c/src/lib/libcpu/arm/preinstall.am
>>> @@ -113,6 +113,19 @@ $(PROJECT_INCLUDE)/bsp/irq.h: s3c24xx/irq/irq.h
>>> $(PROJECT_INCLUDE)/bsp/$(dirstam
>>>         $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h
>>>  PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h
>>>  endif
>>> +if s3c64xx
>>> +$(PROJECT_INCLUDE)/s3c64xx.h: s3c64xx/include/s3c64xx.h
>>> $(PROJECT_INCLUDE)/$(dirstamp)
>>> +       $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/s3c64xx.h
>>> +PREINSTALL_FILES += $(PROJECT_INCLUDE)/s3c64xx.h
>>> +
>>> +$(PROJECT_INCLUDE)/s3c6410.h: s3c64xx/include/s3c6410.h
>>> $(PROJECT_INCLUDE)/$(dirstamp)
>>> +       $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/s3c6410.h
>>> +PREINSTALL_FILES += $(PROJECT_INCLUDE)/s3c6410.h
>>> +
>>> +$(PROJECT_INCLUDE)/bsp/irq.h: s3c64xx/irq/irq.h
>>> $(PROJECT_INCLUDE)/bsp/$(dirstamp)
>>> +       $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h
>>> +PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h
>>> +endif
>>>  if lpc22xx
>>>  $(PROJECT_INCLUDE)/lpc22xx.h: lpc22xx/include/lpc22xx.h
>>> $(PROJECT_INCLUDE)/$(dirstamp)
>>>         $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/lpc22xx.h
>>> diff --git a/c/src/lib/libcpu/arm/s3c64xx/clock/clockdrv.c
>>> b/c/src/lib/libcpu/arm/s3c64xx/clock/clockdrv.c
>>> new file mode 100644
>>> index 0000000..5893014
>>> --- /dev/null
>>> +++ b/c/src/lib/libcpu/arm/s3c64xx/clock/clockdrv.c
>>> @@ -0,0 +1,141 @@
>>> +/*
>>> + *  S3C6410 clock specific using the System Timer
>>> + *
>>> + *  This is hardware specific part of the clock driver. At the end of
>>> this
>>> + *  file, the generic part of the driver is #included.
>>> + *
>>> + *  The license and distribution terms for this file may be
>>> + *  found in the file LICENSE in this distribution or at
>>> + *  http://www.rtems.com/license/LICENSE.
>>> + *
>>> + *  1. modified from S3C2440   Peng Fan van.freenix at gmail.com
>>> + */
>>> +
>>> +#include <rtems.h>
>>> +#include <bsp/irq.h>
>>> +#include <bsp.h>
>>> +#include <s3c64xx.h>
>>> +
>>> +void Clock_isr(rtems_irq_hdl_param arg);
>>> +static void clock_isr_on(const rtems_irq_connect_data *unused);
>>> +static void clock_isr_off(const rtems_irq_connect_data *unused);
>>> +static int clock_isr_is_on(const rtems_irq_connect_data *irq);
>>> +
>>> +rtems_irq_connect_data clock_isr_data = {
>>> +  .name   = BSP_TIMER4,
>>> +  .hdl    = Clock_isr,
>>> +  .handle = NULL,
>>> +  .on     = clock_isr_on,
>>> +  .off    = clock_isr_off,
>>> +  .isOn   = clock_isr_is_on,
>>> +};
>>> +
>>> +/**
>>> + *  Return the nanoseconds since last tick
>>> + */
>>> +uint32_t clock_driver_get_nanoseconds_since_last_tick(void)
>>> +{
>>> +  return 0;
>>> +}
>>> +
>>> +#define Clock_driver_nanoseconds_since_last_tick \
>>> +  clock_driver_get_nanoseconds_since_last_tick
>>> +
>>> +/**
>>> + * When we get the clock interrupt
>>> + *    - clear the interrupt bit?
>>> + *    - restart the timer?
>>> +        Clear BIT_TIMER4 interrupt;                   \
>>> + */
>>> +#define Clock_driver_support_at_tick()                \
>>> +  do {                                                \
>>> +         rTINT_CSTAT |= 1 << 9;\
>>> +  } while(0)
>>> +
>>> +/**
>>> + * Installs the clock ISR. You shouldn't need to change this.
>>> + */
>>> +extern uint32_t *VIC0_VECTADDR;
>>> +extern uint32_t *VIC1_VECTADDR;
>>> +#define Clock_driver_support_install_isr( _new, _old ) \
>>> +  do {                                                 \
>>> +    _old = NULL;                                       \
>>> +    VIC0_VECTADDR[BSP_TIMER4] = _new;                  \
>>> +    rtems_interrupt_handler_install(clock_isr_data.name,\
>>> +                   "TICK TIMER",\
>>> +                   RTEMS_INTERRUPT_UNIQUE,\
>>> +                   clock_isr_data.hdl,\
>>> +                   clock_isr_data.handle);\
>>> +  } while(0)
>>> +
>>> +
>>> +/**
>>> + * Initialize the hardware for the clock
>>> + *   - Set the frequency
>>> + *   - enable it
>>> + *   - clear any pending interrupts
>>> + *
>>> + * Since you may want the clock always running, you can
>>> + * enable interrupts here. If you do so, the clock_isr_on(),
>>> + * clock_isr_off(), and clock_isr_is_on() functions can be
>>> + * NOPs.
>>> + */
>>> +/**
>>> + * The bit and constant number should be redifined using macros
>>> + */
>>> +#define Clock_driver_support_initialize_hardware() \
>>> +  do { \
>>> +         rTCON = 0x0;\
>>> +         rTINT_CSTAT |= 1 << 4;\
>>> +         bsp_interrupt_vector_enable(BSP_TIMER4);\
>>> +         rTCFG0 = 0x0101;\
>>> +         rTCFG1 = (rTCFG1 & 0xf0000) | 0x40000;\
>>> +         rTCNTB4 = 0x512d;\
>>> +         rTCON = (rTCON & ~0x00700000) | (1<<22) | (1<<21);\
>>> +         rTCON = (rTCON & ~0x00700000) | (1<<22) | (1<<20);\
>>> +         /* auto load, start Timer 4 */\
>>> +    } while (0)
>>> +
>>> +/**
>>> + * Do whatever you need to shut the clock down and remove the
>>> + * interrupt handler. Since this normally only gets called on
>>> + * RTEMS shutdown, you may not need to do anything other than
>>> + * remove the ISR.
>>> + */
>>> +#define Clock_driver_support_shutdown_hardware()
>>>  \
>>> +  do {
>>>  \
>>> +        /* Disable timer */ \
>>> +        BSP_remove_rtems_irq_handler(&clock_isr_data);
>>>  \
>>> +     } while (0)
>>> +
>>> +/**
>>> + * Enables clock interrupt.
>>> + *
>>> + * If the interrupt is always on, this can be a NOP.
>>> + */
>>> +static void clock_isr_on(const rtems_irq_connect_data *unused)
>>> +{
>>> +}
>>> +
>>> +/**
>>> + * Disables clock interrupts
>>> + *
>>> + * If the interrupt is always on, this can be a NOP.
>>> + */
>>> +static void clock_isr_off(const rtems_irq_connect_data *unused)
>>> +{
>>> +    return;
>>> +}
>>> +
>>> +/**
>>> + * Tests to see if clock interrupt is enabled, and returns 1 if so.
>>> + * If interrupt is not enabled, returns 0.
>>> + *
>>> + * If the interrupt is always on, this always returns 1.
>>> + */
>>> +static int clock_isr_is_on(const rtems_irq_connect_data *irq)
>>> +{
>>> +}
>>> +
>>> +/* Make sure to include this, and only at the end of the file */
>>> +#include "../../../../libbsp/shared/clockdrv_shell.h"
>>> diff --git a/c/src/lib/libcpu/arm/s3c64xx/clock/support.c
>>> b/c/src/lib/libcpu/arm/s3c64xx/clock/support.c
>>> new file mode 100644
>>> index 0000000..f4a853c
>>> --- /dev/null
>>> +++ b/c/src/lib/libcpu/arm/s3c64xx/clock/support.c
>>> @@ -0,0 +1,51 @@
>>> +/*
>>> + * 1. Modified from S3C2440    Peng Fan van.freenix at gmail.com
>>> + *
>>> + * Note: Now the clock related setting is done in uboot.
>>> + *      This will be fixed in future
>>> + */
>>> +#include <rtems.h>
>>> +#include <bsp.h>
>>> +#include <s3c64xx.h>
>>> +
>>> +/*
>>> ------------------------------------------------------------------------- */
>>> +/* NOTE: This describes the proper use of this file.
>>> + *
>>> + * BSP_OSC_FREQ should be defined as the input frequency of the PLL.
>>> + *
>>> + * get_FCLK(), get_HCLK(), get_PCLK() and get_UCLK() return the clock of
>>> + * the specified bus in HZ.
>>> + */
>>> +/*
>>> ------------------------------------------------------------------------- */
>>> +
>>> +uint32_t *VIC0_VECTADDR = (uint32_t *)VIC0_VECTADDR_BASE;
>>> +uint32_t *VIC1_VECTADDR = (uint32_t *)VIC1_VECTADDR_BASE;
>>> +/* return FCLK frequency */
>>> +uint32_t get_FCLK(void)
>>> +{
>>> +       /* not implemented */
>>> +       return 0;
>>> +}
>>> +
>>> +/* return UCLK frequency */
>>> +uint32_t get_UCLK(void)
>>> +{
>>> +       /* not implemented */
>>> +       return 0;
>>> +}
>>> +
>>> +/* return HCLK frequency */
>>> +uint32_t get_HCLK(void)
>>> +{
>>> +       /* not implemented */
>>> +       return 0;
>>> +}
>>> +
>>> +/* return PCLK frequency */
>>> +uint32_t get_PCLK(void)
>>> +{
>>> +       /* Just return uboot configured freq.
>>> +        * Fix this in future
>>> +        */
>>> +       return 66000000;
>>> +}
>>> diff --git a/c/src/lib/libcpu/arm/s3c64xx/include/s3c6410.h
>>> b/c/src/lib/libcpu/arm/s3c64xx/include/s3c6410.h
>>> new file mode 100644
>>> index 0000000..56b1dcd
>>> --- /dev/null
>>> +++ b/c/src/lib/libcpu/arm/s3c64xx/include/s3c6410.h
>>> @@ -0,0 +1,211 @@
>>> +/************************************************
>>> + * NAME     : s3c6410.h
>>> + * Version  : 4.07.2013
>>> + *
>>> + * for the Samsung Development Board
>>> + ************************************************/
>>> +
>>> +#ifndef __S3C6410_H__
>>> +#define __S3C6410_H__
>>> +
>>> +#define __reg(addr)    (*(volatile unsigned *)(addr))
>>> +/* UART */
>>> +#define UART_BASE      (0x7F005000)
>>> +#define UART0_BASE     (UART_BASE + 0x0)
>>> +#define UART1_BASE     (UART_BASE + 0x400)
>>> +#define UART2_BASE     (UART_BASE + 0x800)
>>> +#define UART2_BASE     (UART_BASE + 0xC00)
>>> +
>>> +#define rULCON0                __reg(UART0_BASE + 0x00)
>>> +#define rUCON0         __reg(UART0_BASE + 0x04)
>>> +#define rUFCON0                __reg(UART0_BASE + 0x08)
>>> +#define rUMCON0                __reg(UART0_BASE + 0x0C)
>>> +#define rUTRSTAT0      __reg(UART0_BASE + 0x10)
>>> +#define rUERSTAT0      __reg(UART0_BASE + 0x14)
>>> +#define rUFSTAT0       __reg(UART0_BASE + 0x18)
>>> +#define rUMSTAT0       __reg(UART0_BASE + 0x1C)
>>> +#define rUTXH0         __reg(UART0_BASE + 0x20)
>>> +#define rURXH0         __reg(UART0_BASE + 0x24)
>>> +#define rUBRDIV0       __reg(UART0_BASE + 0x28)
>>> +#define rUDIVSLOT0     __reg(UART0_BASE + 0x2C)
>>> +#define rUINTP0                __reg(UART0_BASE + 0x30)
>>> +#define rUINTSP0       __reg(UART0_BASE + 0x34)
>>> +#define rUINTM0                __reg(UART0_BASE + 0x38)
>>> +
>>> +#define rULCON1                __reg(UART1_BASE + 0x00)
>>> +#define rUCON1         __reg(UART1_BASE + 0x04)
>>> +#define rUFCON1                __reg(UART1_BASE + 0x08)
>>> +#define rUMCON1                __reg(UART1_BASE + 0x0C)
>>> +#define rUTRSTAT1      __reg(UART1_BASE + 0x10)
>>> +#define rUERSTAT1      __reg(UART1_BASE + 0x14)
>>> +#define rUFSTAT1       __reg(UART1_BASE + 0x18)
>>> +#define rUMSTAT1       __reg(UART1_BASE + 0x1C)
>>> +#define rUTXH1         __reg(UART1_BASE + 0x20)
>>> +#define rURXH1         __reg(UART1_BASE + 0x24)
>>> +#define rUBRDIV1       __reg(UART1_BASE + 0x28)
>>> +#define rUDIVSLOT1     __reg(UART1_BASE + 0x2C)
>>> +#define rUINTP1                __reg(UART1_BASE + 0x30)
>>> +#define rUINTSP1       __reg(UART1_BASE + 0x34)
>>> +#define rUINTM1                __reg(UART1_BASE + 0x38)
>>> +
>>> +/* GPIO */
>>> +#define GPIO_BASE      (0x7F008000)
>>> +#define GPIOA_BASE     GPIO_BASE
>>> +
>>> +#define rGPKCON0       __reg(0x7F008800)
>>> +#define rGPKCON1       __reg(0x7F008804)
>>> +#define rGPKDAT                __reg(0x7F008808)
>>> +#define rGPKPUD                __reg(0x7F00880C)
>>> +
>>> +#define rEINT0PEND     __reg(0x7F008924)
>>> +
>>> +
>>> +/* TIMER */
>>> +#define TIMER_BASE     (0x7F006000)
>>> +#define rTCFG0         __reg(TIMER_BASE + 0x0)
>>> +#define rTCFG1         __reg(TIMER_BASE + 0x4)
>>> +#define rTCON                  __reg(TIMER_BASE + 0x8)
>>> +#define rTCNTB0                __reg(TIMER_BASE + 0xC)
>>> +#define rTCMPB0                __reg(TIMER_BASE + 0x10)
>>> +#define rTCNTO0                __reg(TIMER_BASE + 0x14)
>>> +
>>> +#define rTCNTB1                __reg(TIMER_BASE + 0x18)
>>> +#define rTCMPB1                __reg(TIMER_BASE + 0x1C)
>>> +#define rTCNTO1                __reg(TIMER_BASE + 0x20)
>>> +
>>> +#define rTCNTB2                __reg(TIMER_BASE + 0x24)
>>> +#define rTCNTO2                __reg(TIMER_BASE + 0x2C)
>>> +#define rTCNTB3                __reg(TIMER_BASE + 0x30)
>>> +#define rTCNTO3                __reg(TIMER_BASE + 0x38)
>>> +#define rTCNTB4                __reg(TIMER_BASE + 0x3C)
>>> +#define rTCNTO4                __reg(TIMER_BASE + 0x40)
>>> +
>>> +#define rTINT_CSTAT    __reg(TIMER_BASE + 0x44)
>>> +
>>> +
>>> +/*
>>> + * Interrupt
>>> + */
>>> +/* VIC */
>>> +#define VIC0_BASE_ADDR         (0x71200000)
>>> +#define VIC1_BASE_ADDR         (0x71300000)
>>> +#define rVIC0_IRQSTATUS                        __reg(VIC0_BASE_ADDR +
>>> 0x0)
>>> +#define rVIC0_FIQSTATUS                        __reg(VIC0_BASE_ADDR +
>>> 0x4)
>>> +#define rVIC0_RAWINTR                          __reg(VIC0_BASE_ADDR +
>>> 0x8)
>>> +#define rVIC0_INTSELECT                        __reg(VIC0_BASE_ADDR +
>>> 0xC)
>>> +#define rVIC0_INTENABLE                        __reg(VIC0_BASE_ADDR +
>>> 0x10)
>>> +#define rVIC0_INTENCLEAR               __reg(VIC0_BASE_ADDR + 0x14)
>>> +#define rVIC0_SOFTINT                          __reg(VIC0_BASE_ADDR +
>>> 0x18)
>>> +#define rVIC0_SOFTINTCLEAR     __reg(VIC0_BASE_ADDR + 0x1C)
>>> +#define rVIC0_PROTECTION               __reg(VIC0_BASE_ADDR + 0x20)
>>> +#define rVIC0_SWPPIORITYMASK   __reg(VIC0_BASE_ADDR + 0x24)
>>> +#define rVIC0_PRIORITYDAISY    __reg(VIC0_BASE_ADDR + 0x28)
>>> +#define VIC0_VECTADDR_BASE     (VIC0_BASE_ADDR + 0x100)
>>> +
>>> +#define rVIC0_ADDRESS                          __reg(VIC0_BASE_ADDR +
>>> 0xF00)
>>> +
>>> +
>>> +
>>> +#define rVIC1_IRQSTATUS                        __reg(VIC1_BASE_ADDR +
>>> 0x0)
>>> +#define rVIC1_FIQSTATUS                        __reg(VIC1_BASE_ADDR +
>>> 0x4)
>>> +#define rVIC1_RAWINTR                          __reg(VIC1_BASE_ADDR +
>>> 0x8)
>>> +#define rVIC1_INTSELECT                        __reg(VIC1_BASE_ADDR +
>>> 0xC)
>>> +#define rVIC1_INTENABLE                        __reg(VIC1_BASE_ADDR +
>>> 0x10)
>>> +#define rVIC1_INTENCLEAR               __reg(VIC1_BASE_ADDR + 0x14)
>>> +#define rVIC1_SOFTINT                          __reg(VIC1_BASE_ADDR +
>>> 0x18)
>>> +#define rVIC1_SOFTINTCLEAR     __reg(VIC1_BASE_ADDR + 0x1C)
>>> +#define rVIC1_PROTECTION               __reg(VIC1_BASE_ADDR + 0x20)
>>> +#define rVIC1_SWPPIORITYMASK   __reg(VIC1_BASE_ADDR + 0x24)
>>> +#define rVIC1_PRIORITYDAISY    __reg(VIC1_BASE_ADDR + 0x28)
>>> +#define VIC1_VECTADDR_BASE     (VIC1_BASE_ADDR + 0x100)
>>> +
>>> +#define rVIC1_ADDRESS                          __reg(VIC1_BASE_ADDR +
>>> 0xF00)
>>> +
>>> +
>>> +/* ADC */
>>> +#define rADCCON
>>>  __reg(0x7E00B000)
>>> +#define rADCTSC
>>>  __reg(0x7E00B004)
>>> +#define rADCDLY
>>>  __reg(0x7E00B008)
>>> +#define rADCDAT0
>>> __reg(0x7E00B00C)
>>> +#define rADCDAT1
>>> __reg(0x7E00B010)
>>> +#define rADCUPDN
>>> __reg(0x7E00B014)
>>> +#define rADCCLRINT                                     __reg(0x7E00B018)
>>> +#define rADCCLRINTPNDNUP               __reg(0x7E00B020)
>>> +
>>> +/* WATCH DOG */
>>> +#define rWTCON
>>> __reg(0x7E004000)
>>> +#define rWTDAT
>>> __reg(0x7E004004)
>>> +#define rWTCNT
>>> __reg(0x7E004008)
>>> +#define rWTCLRINT
>>>  __reg(0x7E00400C)
>>> +
>>> +/* RTC */
>>> +#define rINTP
>>>  __reg(0x7E005030)
>>> +
>>> +#define rTICCNT
>>>  __reg(0x7E005044)
>>> +
>>> +
>>> +/* NAND */
>>> +#define  NAND_BASE             0x70200000
>>> +
>>> +#define rNFCONF
>>>  __reg(NAND_BASE + 0x0)
>>> +#define rNFCONT
>>>  __reg(NAND_BASE + 0x4)
>>> +#define rNFCNND
>>>  __reg(NAND_BASE + 0x8)
>>> +#define rNFADDR
>>>  __reg(NAND_BASE + 0xC)
>>> +#define rNFDATA
>>>  __reg(NAND_BASE + 0x10)
>>> +#define rNFMECCD0                                      __reg(NAND_BASE
>>> + 0x14)
>>> +#define rNFMECCD1                                      __reg(NAND_BASE
>>> + 0x18)
>>> +#define rNFSECCD                                       __reg(NAND_BASE
>>> + 0x1C)
>>> +#define rNFSBLK
>>>  __reg(NAND_BASE + 0x20)
>>> +#define rNFEBLK
>>>  __reg(NAND_BASE + 0x24)
>>> +#define rNFSTAT
>>>  __reg(NAND_BASE + 0x28)
>>> +#define rNFECCERR0                             __reg(NAND_BASE + 0x2C)
>>> +#define rNFECCERR1                             __reg(NAND_BASE + 0x30)
>>> +#define rNFMECC0                                       __reg(NAND_BASE
>>> + 0x34)
>>> +#define rNFMECC1                                       __reg(NAND_BASE
>>> + 0x38)
>>> +#define rNFSECC
>>>  __reg(NAND_BASE + 0x3C)
>>> +#define rNFMLCBITPT                            __reg(NAND_BASE + 0x40)
>>> +#define rNF8ECCERR0                            __reg(NAND_BASE + 0x44)
>>> +#define rNF8ECCERR1                            __reg(NAND_BASE + 0x48)
>>> +#define rNF8ECCERR2                            __reg(NAND_BASE + 0x4C)
>>> +#define rNFM8ECC0                                      __reg(NAND_BASE
>>> + 0x50)
>>> +#define rNFM8ECC1                                      __reg(NAND_BASE
>>> + 0x54)
>>> +#define rNFM8ECC2                                      __reg(NAND_BASE
>>> + 0x58)
>>> +#define rNFM8ECC3                                      __reg(NAND_BASE
>>> + 0x5C)
>>> +#define rNFMLC8BITPT0                  __reg(NAND_BASE + 0x60)
>>> +#define rNFMLC8BITPT1                  __reg(NAND_BASE + 0x64)
>>> +
>>> +#define BIT0                   0x00000001
>>> +#define BIT1                   0x00000002
>>> +#define BIT2                   0x00000004
>>> +#define BIT3                   0x00000008
>>> +#define BIT4                   0x00000010
>>> +#define BIT5                   0x00000020
>>> +#define BIT6                   0x00000040
>>> +#define BIT7                   0x00000080
>>> +#define BIT8                   0x00000100
>>> +#define BIT9                   0x00000200
>>> +#define BIT10                  0x00000400
>>> +#define BIT11                  0x00000800
>>> +#define BIT12                  0x00001000
>>> +#define BIT13                  0x00002000
>>> +#define BIT14                  0x00004000
>>> +#define BIT15                  0x00008000
>>> +#define BIT16                  0x00010000
>>> +#define BIT17                  0x00020000
>>> +#define BIT18                  0x00040000
>>> +#define BIT19                  0x00080000
>>> +#define BIT20                  0x00100000
>>> +#define BIT21                  0x00200000
>>> +#define BIT22                  0x00400000
>>> +#define BIT23                  0x00800000
>>> +#define BIT24                  0x01000000
>>> +#define BIT25                  0x02000000
>>> +#define BIT26                  0x04000000
>>> +#define BIT27                  0x08000000
>>> +#define BIT28                  0x10000000
>>> +#define BIT29                  0x20000000
>>> +#define BIT30                  0x40000000
>>> +#define BIT31                  0x80000000
>>> +
>>> +
>>> +#endif /*__S3C6410_H__*/
>>> diff --git a/c/src/lib/libcpu/arm/s3c64xx/include/s3c64xx.h
>>> b/c/src/lib/libcpu/arm/s3c64xx/include/s3c64xx.h
>>> new file mode 100644
>>> index 0000000..6396629
>>> --- /dev/null
>>> +++ b/c/src/lib/libcpu/arm/s3c64xx/include/s3c64xx.h
>>> @@ -0,0 +1,15 @@
>>> +/************************************************
>>> + * NAME     : s3c64xx.h
>>> + * Version  : 4.07.2013
>>> + *
>>> + * share code for different Samsung CPU
>>> + ************************************************/
>>> +
>>> +#ifndef S3C64XX_H_
>>> +#define S3C64XX_H_
>>> +
>>> +#ifdef CPU_S3C6410
>>> +#include <s3c6410.h>
>>> +#endif
>>> +
>>> +#endif /*S3C64XX_H_*/
>>> diff --git a/c/src/lib/libcpu/arm/s3c64xx/irq/irq.c
>>> b/c/src/lib/libcpu/arm/s3c64xx/irq/irq.c
>>> new file mode 100644
>>> index 0000000..e0cb6d2
>>> --- /dev/null
>>> +++ b/c/src/lib/libcpu/arm/s3c64xx/irq/irq.c
>>> @@ -0,0 +1,79 @@
>>> +/* irq.c
>>> + *
>>> + *  This file contains the implementation of the function described in
>>> irq.h
>>> + *
>>> + *  Copyright (c) 2010 embedded brains GmbH.
>>> + *
>>> + *  CopyRight (C) 2000 Canon Research France SA.
>>> + *  Emmanuel Raguet,  mailto:raguet at crf.canon.fr
>>> + *
>>> + *  The license and distribution terms for this file may be
>>> + *  found in the file LICENSE in this distribution or at
>>> + *  http://www.rtems.com/license/LICENSE.
>>> + *
>>> + *  1. Modified from S3C2440   Peng Fan van.freenix at gmail.com
>>> + */
>>> +
>>> +#include <rtems/score/armv4.h>
>>> +
>>> +#include <bsp.h>
>>> +#include <bsp/irq.h>
>>> +#include <bsp/irq-generic.h>
>>> +
>>> +#include <s3c64xx.h>
>>> +
>>> +typedef void (*vicfunc)(void);
>>> +void bsp_interrupt_dispatch(void)
>>> +{
>>> +       uint32_t vector_addr0 = rVIC0_ADDRESS;
>>> +       uint32_t vector_addr1 = rVIC1_ADDRESS;
>>> +       if (vector_addr0 != 0){
>>> +               void (*vicfunc)(void) = (void(*)(void))rVIC0_ADDRESS;
>>> +               vicfunc();
>>> +       }
>>> +       rVIC0_ADDRESS = 0x0;
>>> +       if (vector_addr1 != 0){
>>> +               void (*vicfunc)(void) = (void(*)(void))rVIC1_ADDRESS;
>>> +               vicfunc();
>>> +       }
>>> +       rVIC1_ADDRESS = 0x0;
>>> +}
>>> +
>>> +rtems_status_code bsp_interrupt_vector_enable(rtems_vector_number
>>> vector)
>>> +{
>>> +  if (vector < 32)
>>> +  {
>>> +       rVIC0_INTENABLE |= 1 << vector;
>>> +  }
>>> +  else if (vector < 64)
>>> +  {
>>> +       rVIC1_INTENABLE |= 1 << (vector - 32);
>>> +  }
>>> +  else
>>> +         printk("%s failed\n", __func__);
>>> +
>>> +  return RTEMS_SUCCESSFUL;
>>> +}
>>> +
>>> +rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number
>>> vector)
>>> +{
>>> +  if (vector < 32)
>>> +  {
>>> +       rVIC0_INTENCLEAR |= 1 << vector;
>>> +  }
>>> +  else if (vector < 64)
>>> +  {
>>> +       rVIC1_INTENCLEAR |= 1 << (vector - 32);
>>> +  }
>>> +  else
>>> +         printk("%s failed\n", __func__);
>>> +
>>> +  return RTEMS_SUCCESSFUL;
>>> +}
>>> +
>>> +rtems_status_code bsp_interrupt_facility_initialize(void)
>>> +{
>>> +  _CPU_ISR_install_vector(ARM_EXCEPTION_IRQ,
>>> _ARMV4_Exception_interrupt, NULL);
>>> +
>>> +  return RTEMS_SUCCESSFUL;
>>> +}
>>> diff --git a/c/src/lib/libcpu/arm/s3c64xx/irq/irq.h
>>> b/c/src/lib/libcpu/arm/s3c64xx/irq/irq.h
>>> new file mode 100644
>>> index 0000000..2f3ca6a
>>> --- /dev/null
>>> +++ b/c/src/lib/libcpu/arm/s3c64xx/irq/irq.h
>>> @@ -0,0 +1,100 @@
>>> +/* irq.h
>>> + *
>>> + *  Copyright (c) 2010 embedded brains GmbH.
>>> + *
>>> + *  CopyRight (C) 2000 Canon Research France SA.
>>> + *  Emmanuel Raguet,  mailto:raguet at crf.canon.fr
>>> + *
>>> + *  Common file, merged from s3c2400/irq/irq.h and s3c2410/irq/irq.h
>>> + *
>>> + *  1. Modified from s3c2400   Peng Fan van.freenix at gmail.com
>>> + */
>>> +
>>> +#ifndef _IRQ_H_
>>> +#define _IRQ_H_
>>> +
>>> +#ifndef ASM
>>> +#include <rtems.h>
>>> +#include <rtems/irq.h>
>>> +#include <rtems/irq-extension.h>
>>> +
>>> +#include <s3c64xx.h>
>>> +
>>> +#ifdef CPU_S3C6410
>>> +  /* possible interrupt sources */
>>> +#define BSP_EINT0                      0
>>> +#define BSP_EINT1                      1
>>> +#define BSP_RTC_TIC            2
>>> +#define BSP_CAMIF_C            3
>>> +#define BSP_CAMIF_P            4
>>> +#define        BSP_I2C1                        5
>>> +#define BSP_I2S0_1_V40 6
>>> +/* 7 is reserved */
>>> +#define BSP_3D                         8
>>> +#define BSP_POST0                      9
>>> +#define BSP_RPTATOR            10
>>> +#define BSP_2D                         11
>>> +#define BSP_TVENC                      12
>>> +#define BSP_SCALER             13
>>> +#define BSP_BATF                       14
>>> +#define BSP_JPEG                       15
>>> +#define BSP_MFC                                16
>>> +#define BSP_SDMA0                      17
>>> +#define BSP_SDMA1                      18
>>> +#define BSP_ARM_DMAERR 19
>>> +#define BSP_ARM_DMA            20
>>> +#define BSP_ARM_DMAS   21
>>> +#define BSP_KEYPAD             22
>>> +#define        BSP_TIMER0              23
>>> +#define BSP_TIMER1             24
>>> +#define BSP_TIMER2             25
>>> +#define BSP_WDT                                26
>>> +#define BSP_TIMER3             27
>>> +#define BSP_TIMER4             28
>>> +#define BSP_LCD0                       29
>>> +#define BSP_LCD1                       30
>>> +#define BSP_LCD2                       31
>>> +#define BSP_EINT2                      32
>>> +#define BSP_EINT3                      33
>>> +#define BSP_PCM0                       34
>>> +#define BSP_PCM1                       35
>>> +#define BSP_AC97                       36
>>> +#define BSP_UART0                      37
>>> +#define BSP_UART1                      38
>>> +#define BSP_UART2                      39
>>> +#define BSP_UART3                      40
>>> +#define BSP_DMA0                       41
>>> +#define BSP_DMA1                       42
>>> +#define BSP_ONENAND0   43
>>> +#define BSP_ONENAND1   44
>>> +#define BSP_NFC                                45
>>> +#define BSP_CFC                                46
>>> +#define BSP_UHOST                      47
>>> +#define BSP_SPI0                       48
>>> +#define BSP_SPI1                       49
>>> +#define BSP_HSMMC2             49
>>> +#define BSP_I2C0                       50
>>> +#define BSP_HSItx                      51
>>> +#define BSP_HSIrx                      52
>>> +#define BSP_EINT4                      53
>>> +#define BSP_MSM                                54
>>> +#define BSP_HOSTIF             55
>>> +#define BSP_HSMMC0             56
>>> +#define BSP_HSMMC1             57
>>> +#define BSP_OTG                                58
>>> +#define BSP_IrDA                       59
>>> +#define BSP_RTC_ALARM  60
>>> +#define BSP_SEC                                61
>>> +#define BSP_PENDNUP            62
>>> +#define BSP_ADC                                63
>>> +
>>> +#define BSP_MAX_INT            64
>>> +#endif
>>> +
>>> +#define BSP_INTERRUPT_VECTOR_MIN 0
>>> +
>>> +#define BSP_INTERRUPT_VECTOR_MAX (BSP_MAX_INT - 1)
>>> +
>>> +#endif /* ASM */
>>> +#endif /* _IRQ_H_ */
>>> +/* end of include file */
>>> diff --git a/c/src/lib/libcpu/arm/shared/include/arm-cp15.h
>>> b/c/src/lib/libcpu/arm/shared/include/arm-cp15.h
>>> index 3edc83f..45af5dd 100644
>>> --- a/c/src/lib/libcpu/arm/shared/include/arm-cp15.h
>>> +++ b/c/src/lib/libcpu/arm/shared/include/arm-cp15.h
>>> @@ -609,6 +609,23 @@ static inline void
>>> arm_cp15_data_cache_test_and_clean(void)
>>>    );
>>>  }
>>>
>>> +static inline void arm_cp15_data_cache_clean_and_invalidate(void)
>>> +{
>>> +  ARM_SWITCH_REGISTERS;
>>> +
>>> +  uint32_t sbz = 0;
>>> +
>>> +  __asm__ volatile (
>>> +    ARM_SWITCH_TO_ARM
>>> +    "mcr p15, 0, %[sbz], c7, c14, 0\n"
>>> +    ARM_SWITCH_BACK
>>> +    : ARM_SWITCH_OUTPUT
>>> +    : [sbz] "r" (sbz)
>>> +    : "memory"
>>> +  );
>>> +
>>> +}
>>> +
>>>  static inline void arm_cp15_data_cache_clean_and_invalidate_line(const
>>> void *mva)
>>>  {
>>>    ARM_SWITCH_REGISTERS;
>>> --
>>> 1.7.10.4
>>>
>>> _______________________________________________
>>> rtems-devel mailing list
>>> rtems-devel at rtems.org
>>> http://www.rtems.org/mailman/listinfo/rtems-devel
>>>
>>
>


-- 
Regards,
Dhananjay M Balan,
Department Of Computer Science,
College Of Engineering, Trivandrum.
http://cet.ac.in
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