Raspberry/ARM processor halts when invalidating tlb

Hesham Moustafa heshamelmatary at gmail.com
Mon Aug 26 00:15:27 UTC 2013


Hey Alan,

Thanks for your detailed reply. MMU
 and Caches are working correctly on Raspberry Pi BSP now.
You may review my latest patches and apply them. I appreciate your feedback.

Regards,
Hesham


On Fri, Aug 23, 2013 at 4:19 AM, Alan Cudmore <alan.cudmore at gmail.com>wrote:

>  Hi Hesham,
> I don't have an answer for you, but you may be able to find some help or
> example code on the raspberrypi.org forums.
> A couple of examples:
> http://www.raspberrypi.org/phpBB3/viewtopic.php?t=40183&p=336705
> http://www.raspberrypi.org/phpBB3/viewtopic.php?t=40665&p=332205
>
> I avoided the MMU setup on the raspberry pi BSP, because I knew that the
> GPU based bootloader set up the memory for the ARM CPU. More info on the
> whole boot process here:
> http://elinux.org/RPi_Software
>
> Another nice thing to have for work like this is a JTAG debugger setup. I
> hope I can get an inexpensive setup for mine before I try to add any more
> drivers.
> The readme at the repository below has some good info on setting up JTAG
> on the raspberry pi:
> https://github.com/dwelch67/raspberrypi/tree/master/armjtag
>
> Alan
>
>
>
> On 8/22/2013 6:48 PM, Hesham Moustafa wrote:
>
> Hey all,
>
>  I am working on Raspberry Pi BSP which has ARM1176JZF-S (ARMv6)
> processor on it. Here is what I am doing that causes the processor to halt:
>
>  At BSP startup, specifically in bsp_start_hook_0 function, I call
> another function that :
> 1- Initialize first level page tables (sections) with READ/WRITE
> permissions.
> 2- Invalidate TLB.
> 3- Enable MMU, Cache, Protection bits in control register.
>
>  Initialization is done correctly and the program reaches my application
> (test case), which tries to update first level page table entries to force
> another protection attributes for a memory region. At this part, after, or
> before, modifying the page table entry, I try to invalidate TLB but the
> program halts there. I disable MMU and Caches during updating page tables
> and invalidating TLB.
>
>  When removing the function call that invalidates the TLB, the program
> proceed to the end successfully.
>
>  Not sure why the processor halts when trying to invalidate the TLB "at
> the second time". I hope someone can tell me the reason.
>
>  Regards,
> Hesham
>
>
> _______________________________________________
> rtems-devel mailing listrtems-devel at rtems.orghttp://www.rtems.org/mailman/listinfo/rtems-devel
>
>
>
> _______________________________________________
> rtems-devel mailing list
> rtems-devel at rtems.org
> http://www.rtems.org/mailman/listinfo/rtems-devel
>
>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.rtems.org/pipermail/devel/attachments/20130826/231c6749/attachment-0001.html>


More information about the devel mailing list