[rtems commit] Add Moxie CPU support
Joel Sherrill
joel.sherrill at OARcorp.com
Tue Mar 5 22:40:41 UTC 2013
On 2/28/2013 10:53 PM, Anthony Green wrote:
> Hi Joel,
>
> On Thu, Feb 28, 2013 at 2:10 PM, Joel Sherrill
> <joel.sherrill at oarcorp.com> wrote:.
>> + _CPU_Null_fp_context - Does the Moxie have an FPU? This isn't
>> really used as best I can tell. It isn't initialized.
> No it doesn't. We can remove this.
+1
Remove all Simple Vectored support from score/cpu/moxie and set the
#define for the interrupt model appropriately.
>
>> + Does the Moxie have a bit scan or find first bit type instruction?
> No it doesn't. Is it a big win? I could add something like this if
> it made sense (still lots of opcode space available, but want keep
> core size small - it's a balancing act).
Ignore this for now and put it on your future list for maybe a CPU model
variant.
From an RTEMS perspective, the bit scan type instruction is invoked
twice when
the highest priority ready task voluntarily blocks. IMO this is the most
common
task blocking scenario. But it is a matter of cycles. How many does it
take to
perform the generic algorithm, or maybe the log2 table one? How long does
your proposed instruction take?
I have seen architectures with bit scan instructions where the benefits were
not there to use the instruction. It had a high cycle cost. On other
architectures,
it was 1-2 cycles and worth using.
Many architectures supported by RTEMS do NOT have this type of instruction.
>> + Will the Moxie use Simple Vectored Interrupts or is it an
>> architecture that will usually have an external PIC?
> External PIC. I'm working on that next week.
Separate email.
>> + We need a chapter in doc/cpu_supplement on the Moxie.
> I'll work on that.
This may end up being links to information on the Moxie site.
Calling convention, etc.
But in score/cpu, it is important to capture why flags are set a particular
way.
> Thanks,
>
> AG
--
Joel Sherrill, Ph.D. Director of Research & Development
joel.sherrill at OARcorp.com On-Line Applications Research
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