[PATCH] sparc: store the tpc for asynchronous traps

[Gedare Bloom]

The current ISR handling does not save a copy of the PC in the TPC field
of the interrupt frame for asynchronous traps.
---
 c/src/lib/libbsp/sparc/shared/irq_asm.S |    3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/c/src/lib/libbsp/sparc/shared/irq_asm.S b/c/src/lib/libbsp/sparc/shared/irq_asm.S
index fc4c0be..fc368a2 100644
--- a/c/src/lib/libbsp/sparc/shared/irq_asm.S
+++ b/c/src/lib/libbsp/sparc/shared/irq_asm.S
@@ -255,8 +255,7 @@ SYM(_ISR_Handler):
 
         andcc   %l3, SPARC_SYNCHRONOUS_TRAP_BIT_MASK, %g0
                                       ! Is this a synchronous trap?
-        be,a    win_ovflow            ! No, then skip the adjustment
-        nop                           ! DELAY
+        be    win_ovflow            ! No, then skip the adjustment
         mov     %l1, %l6              ! save trapped pc for debug info
         mov     %l2, %l1              ! do not return to the instruction
         add     %l2, 4, %l2           ! indicated
-- 
1.7.9.5