[PATCH] lpc24xx/lpc17xx: Probe for ETHERNET PHY MII address

[Pavel Pisa]

Hello Sebastian,

On Monday 13 of January 2014 13:14:10 Sebastian Huber wrote:
> Hello Pavel,
>
> On 2014-01-03 14:39, Pavel Pisa wrote:
> > --- a/c/src/lib/libbsp/arm/shared/lpc/network/lpc-ethernet.c
> > +++ b/c/src/lib/libbsp/arm/shared/lpc/network/lpc-ethernet.c
> > @@ -62,8 +62,11 @@
> >   #endif
> >
> >   #define DEFAULT_PHY 0
> > +#define DEFAULT_SELECTED_PHY 0
> >   #define WATCHDOG_TIMEOUT 5
> >
> > +static int lpc_eth_selected_phy = DEFAULT_SELECTED_PHY;
>
> does it make sense to add this to the lpc_eth_driver_entry structure?

It would preferred option from long time perspective.
On the other hand, I think that there is very low chance
that there exists LPC17xx chip with two ETHERNET interfaces.

Do you update patch or should I do that or is better to
include original after more testing and do the variable
movement in follow-up patch?

> > +
> >   typedef struct {
> >     uint32_t start;
> >     uint32_t control;
> > @@ -1230,9 +1251,41 @@ static const lpc_eth_phy_action
> > lpc_eth_phy_up_post_action_KSZ80X1RNL [] = { { 0x10, 0x10, 0 }
> >   };
> >
> > +#ifdef LPC24XX_PIN_ETHERNET_POWER_DOWN
>
> Is this LPC24XX_PIN_ETHERNET_POWER_DOWN a new BSP option?
>
> [...]

Yes, we have this pin connected to the PHY on our BSP.

I can move that somewhere else if it does not fit there.
But support for reset pin mapping to ETHERNET interface/driver
is quite common even in Linux. We use it in our DTS for i.MX53
board.

By the way, we plan to provide at least schematic but more probably
even full board design files in PEDA ( http://sourceforge.net/projects/peda/ )
for our LX_CPU1 board freely available when we incorporate fixes of
problems found in preproduction samples testing and finish final
version. We have already first two full HPLC spectrophotometric detectors
(laboratory instruments) running with these new boards but this
is a systemless application. But I think that this is interresting board
even for RTEMS and we want to use it even for other, RTEMS based
applications.

The board includes 

LPC1788, 16MB SDRAM and Xilix FPGA (XC6SLX9-2TQG144). It is equipped
by 4 differential HEDL/HEDS IRC inputs for motion applications.
We plan to test even variant with FPU enabled LPC18xx.
I take a prototype with me to Nuremberg Embedded World.

Best wishes,

               Pavel