[PATCH] GCC target fragment for RTEMS with multilib Cortex-R big-endian and hard float modes included.
Joel Sherrill
joel.sherrill at oarcorp.com
Mon Jun 30 17:20:23 UTC 2014
On 6/30/2014 12:20 PM, Pavel Pisa wrote:
> Next big-endian targets added are added to GCC RTEMS setup
> (the first libraries search subdirecory name and the second GCC
> options to select appropriate build mode)
Nice work! A few odd questions.
Did you write this patch? Do you have paperwork with the FSF on file
for GCC submissions?
There are lines commented out in the multilib lists and exceptions. Are
these intentional to list every possible option and keep various arm
files looking alike?
> eb
> - mbig-endian
> - for standard ARMv4
> thumb/eb
> - mthumb mbig-endian
> - for THUMB ARMv4+
> thumb/armv7-r/eb
> - mthumb march=armv7-r mbig-endian
> - for Cortex-R
> thumb/armv7-r/fpu/hard/eb
> - mthumb march=armv7-r mfpu=vfpv3-d16 mfloat-abi=hard mbig-endian
> - for Cortex-R with FPU enabled
>
> and finally hard float target for little-endian ARM Cortex-R which can
> be interresting for porting to Ti's RM48 and RM57x and other Cortex-R little-endian
> based chips
>
> thumb/armv7-r/fpu/hard
> - mthumb march=armv7-r mfpu=vfpv3-d16 mfloat-abi=hard
> - for Cortex-R with FPU enabled
>
> ---
> gcc/config/arm/t-rtems-eabi | 91 +++++++++++++++++++++++++++++++++++++++++++-
> 1 file changed, 89 insertions(+), 2 deletions(-)
>
> Index: gcc-4.9/gcc/config/arm/t-rtems-eabi
> ===================================================================
> --- gcc-4.9.orig/gcc/config/arm/t-rtems-eabi 2013-05-10 17:08:24.000000000 +0200
> +++ gcc-4.9/gcc/config/arm/t-rtems-eabi 2014-06-29 03:11:05.535440734 +0200
> @@ -1,47 +1,134 @@
> # Custom RTEMS EABI multilibs
>
> -MULTILIB_OPTIONS = mthumb march=armv6-m/march=armv7-a/march=armv7-r/march=armv7-m mfpu=neon mfloat-abi=hard
> -MULTILIB_DIRNAMES = thumb armv6-m armv7-a armv7-r armv7-m neon hard
> +MULTILIB_OPTIONS = mthumb march=armv6-m/march=armv7-a/march=armv7-r/march=armv7-m mfpu=neon/mfpu=vfpv3-d16 mfloat-abi=hard
> +MULTILIB_DIRNAMES = thumb armv6-m armv7-a armv7-r armv7-m neon fpu hard
> +
> +# Include big-endian support
> +
> +MULTILIB_OPTIONS += mbig-endian
> +MULTILIB_DIRNAMES += eb
>
> # Enumeration of multilibs
>
> MULTILIB_EXCEPTIONS =
> MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=neon/mfloat-abi=hard
> +MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=vfpv3-d16/mfloat-abi=hard
> MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=neon
> +MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=vfpv3-d16
> MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfloat-abi=hard
> # MULTILIB_EXCEPTIONS += mthumb/march=armv6-m
> # MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=neon/mfloat-abi=hard
> +MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=vfpv3-d16/mfloat-abi=hard
> MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=neon
> +MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=vfpv3-d16
> MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfloat-abi=hard
> # MULTILIB_EXCEPTIONS += mthumb/march=armv7-a
> MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=neon/mfloat-abi=hard
> +#MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=vfpv3-d16/mfloat-abi=hard
> MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=neon
> +MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=vfpv3-d16
> MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfloat-abi=hard
> # MULTILIB_EXCEPTIONS += mthumb/march=armv7-r
> MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=neon/mfloat-abi=hard
> +MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=vfpv3-d16/mfloat-abi=hard
> MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=neon
> +MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=vfpv3-d16
> MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfloat-abi=hard
> # MULTILIB_EXCEPTIONS += mthumb/march=armv7-m
> MULTILIB_EXCEPTIONS += mthumb/mfpu=neon/mfloat-abi=hard
> +MULTILIB_EXCEPTIONS += mthumb/mfpu=vfpv3-d16/mfloat-abi=hard
> MULTILIB_EXCEPTIONS += mthumb/mfpu=neon
> +MULTILIB_EXCEPTIONS += mthumb/mfpu=vfpv3-d16
> MULTILIB_EXCEPTIONS += mthumb/mfloat-abi=hard
> # MULTILIB_EXCEPTIONS += mthumb
> MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=neon/mfloat-abi=hard
> +MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=vfpv3-d16/mfloat-abi=hard
> MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=neon
> +MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=vfpv3-d16
> MULTILIB_EXCEPTIONS += march=armv6-m/mfloat-abi=hard
> MULTILIB_EXCEPTIONS += march=armv6-m
> MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=neon/mfloat-abi=hard
> +MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=vfpv3-d16/mfloat-abi=hard
> MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=neon
> +MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=vfpv3-d16
> MULTILIB_EXCEPTIONS += march=armv7-a/mfloat-abi=hard
> MULTILIB_EXCEPTIONS += march=armv7-a
> MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=neon/mfloat-abi=hard
> +MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=vfpv3-d16/mfloat-abi=hard
> MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=neon
> +MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=vfpv3-d16
> MULTILIB_EXCEPTIONS += march=armv7-r/mfloat-abi=hard
> MULTILIB_EXCEPTIONS += march=armv7-r
> MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=neon/mfloat-abi=hard
> +MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=vfpv3-d16/mfloat-abi=hard
> MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=neon
> +MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=vfpv3-d16
> MULTILIB_EXCEPTIONS += march=armv7-m/mfloat-abi=hard
> MULTILIB_EXCEPTIONS += march=armv7-m
> MULTILIB_EXCEPTIONS += mfpu=neon/mfloat-abi=hard
> +MULTILIB_EXCEPTIONS += mfpu=vfpv3-d16/mfloat-abi=hard
> MULTILIB_EXCEPTIONS += mfpu=neon
> +MULTILIB_EXCEPTIONS += mfpu=vfpv3-d16
> MULTILIB_EXCEPTIONS += mfloat-abi=hard
> +
> +# Exclude unused big-endian combinations
> +
> +MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=neon/mfloat-abi=hard/mbig-endian
> +MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=vfpv3-d16/mfloat-abi=hard/mbig-endian
> +MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=neon/mbig-endian
> +MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=vfpv3-d16/mbig-endian
> +MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfloat-abi=hard/mbig-endian
> +MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mbig-endian
> +MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=neon/mfloat-abi=hard/mbig-endian
> +MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=vfpv3-d16/mfloat-abi=hard/mbig-endian
> +MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=neon/mbig-endian
> +MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=vfpv3-d16/mbig-endian
> +MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfloat-abi=hard/mbig-endian
> +MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mbig-endian
> +MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=neon/mfloat-abi=hard/mbig-endian
> +# MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=vfpv3-d16/mfloat-abi=hard/mbig-endian
> +MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=neon/mbig-endian
> +MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=vfpv3-d16/mbig-endian
> +MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfloat-abi=hard/mbig-endian
> +# MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mbig-endian
> +MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=neon/mfloat-abi=hard/mbig-endian
> +MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=vfpv3-d16/mfloat-abi=hard/mbig-endian
> +MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=neon/mbig-endian
> +MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=vfpv3-d16/mbig-endian
> +MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfloat-abi=hard/mbig-endian
> +MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mbig-endian
> +MULTILIB_EXCEPTIONS += mthumb/mfpu=neon/mfloat-abi=hard/mbig-endian
> +MULTILIB_EXCEPTIONS += mthumb/mfpu=vfpv3-d16/mfloat-abi=hard/mbig-endian
> +MULTILIB_EXCEPTIONS += mthumb/mfpu=neon/mbig-endian
> +MULTILIB_EXCEPTIONS += mthumb/mfpu=vfpv3-d16/mbig-endian
> +MULTILIB_EXCEPTIONS += mthumb/mfloat-abi=hard/mbig-endian
> +# MULTILIB_EXCEPTIONS += mthumb/mbig-endian
> +MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=neon/mfloat-abi=hard/mbig-endian
> +MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=vfpv3-d16/mfloat-abi=hard/mbig-endian
> +MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=neon/mbig-endian
> +MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=vfpv3-d16/mbig-endian
> +MULTILIB_EXCEPTIONS += march=armv6-m/mfloat-abi=hard/mbig-endian
> +MULTILIB_EXCEPTIONS += march=armv6-m/mbig-endian
> +MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=neon/mfloat-abi=hard/mbig-endian
> +MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=vfpv3-d16/mfloat-abi=hard/mbig-endian
> +MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=neon/mbig-endian
> +MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=vfpv3-d16/mbig-endian
> +MULTILIB_EXCEPTIONS += march=armv7-a/mfloat-abi=hard/mbig-endian
> +MULTILIB_EXCEPTIONS += march=armv7-a/mbig-endian
> +MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=neon/mfloat-abi=hard/mbig-endian
> +MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=vfpv3-d16/mfloat-abi=hard/mbig-endian
> +MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=neon/mbig-endian
> +MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=vfpv3-d16/mbig-endian
> +MULTILIB_EXCEPTIONS += march=armv7-r/mfloat-abi=hard/mbig-endian
> +MULTILIB_EXCEPTIONS += march=armv7-r/mbig-endian
> +MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=neon/mfloat-abi=hard/mbig-endian
> +MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=vfpv3-d16/mfloat-abi=hard/mbig-endian
> +MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=neon/mbig-endian
> +MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=vfpv3-d16/mbig-endian
> +MULTILIB_EXCEPTIONS += march=armv7-m/mfloat-abi=hard/mbig-endian
> +MULTILIB_EXCEPTIONS += march=armv7-m/mbig-endian
> +MULTILIB_EXCEPTIONS += mfpu=neon/mfloat-abi=hard/mbig-endian
> +MULTILIB_EXCEPTIONS += mfpu=vfpv3-d16/mfloat-abi=hard/mbig-endian
> +MULTILIB_EXCEPTIONS += mfpu=neon/mbig-endian
> +MULTILIB_EXCEPTIONS += mfpu=vfpv3-d16/mbig-endian
> +MULTILIB_EXCEPTIONS += mfloat-abi=hard/mbig-endian
--
Joel Sherrill, Ph.D. Director of Research & Development
joel.sherrill at OARcorp.com On-Line Applications Research
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