[PATCH] GCC target fragment for RTEMS with multilib Cortex-R big-endian and hard float modes included.

[Pavel Pisa]

Hello Joel,

On Monday 30 of June 2014 19:20:23 Joel Sherrill wrote:
> Did you write this patch? Do you have paperwork with the FSF on file
> for GCC submissions?

As I have already stated, I have no papers signed with FSF but some of my
H8S enhancements has been used by GCC maintainers long time ago.
I can start this  bureaucracy work. But I consider these lines
as config only changes under public domain from me.
I would be happy if somebody with better GCC knowledge considers
what is right and prepare final patch.

> There are lines commented out in the multilib lists and exceptions. Are
> these intentional to list every possible option and keep various arm
> files looking alike?

I have followed original style.

As for the multilib in general, basic GCC principle is to build
Cartesian product of all possible combinations from MULTILIB_OPTIONS
list. I.e. if one yes/no option is added all previous combinations
are used to generate list with new option in yes and no (omitted) state.
The list gets huge very quickly.

The MULTILIB_EXCEPTIONS cuts the above combinatorial explosion.

I have left all combinations in the list and commented out is
that few which are actually used/are meaningfull. Even that additions
which I have left make build longer and storage required for toolchain
bigger. So somebody who does not need some/many of the all options
combinations can uncomment these which he/she does not want
and reduce build time and disk space.

Best wishes,

              Pavel

> > eb
> >    - mbig-endian
> >       - for standard ARMv4
> > thumb/eb
> >    - mthumb mbig-endian
> >       - for THUMB  ARMv4+
> > thumb/armv7-r/eb
> >    - mthumb march=armv7-r mbig-endian
> >       - for Cortex-R
> > thumb/armv7-r/fpu/hard/eb
> >    - mthumb march=armv7-r mfpu=vfpv3-d16 mfloat-abi=hard mbig-endian
> >       - for Cortex-R with FPU enabled
> >
> > and finally hard float target for little-endian ARM Cortex-R which can
> > be interresting for porting to Ti's RM48 and RM57x and other Cortex-R
> > little-endian based chips
> >
> > thumb/armv7-r/fpu/hard
> >    - mthumb march=armv7-r mfpu=vfpv3-d16 mfloat-abi=hard
> >       - for Cortex-R with FPU enabled
> >
> > ---
> >   gcc/config/arm/t-rtems-eabi |   91
> > +++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 89
> > insertions(+), 2 deletions(-)
> >
> > Index: gcc-4.9/gcc/config/arm/t-rtems-eabi
> > ===================================================================
> > --- gcc-4.9.orig/gcc/config/arm/t-rtems-eabi	2013-05-10
> > 17:08:24.000000000 +0200 +++
> > gcc-4.9/gcc/config/arm/t-rtems-eabi	2014-06-29 03:11:05.535440734 +0200
> > @@ -1,47 +1,134 @@
> >   # Custom RTEMS EABI multilibs
> >
> > -MULTILIB_OPTIONS  = mthumb
> > march=armv6-m/march=armv7-a/march=armv7-r/march=armv7-m mfpu=neon
> > mfloat-abi=hard -MULTILIB_DIRNAMES = thumb armv6-m armv7-a armv7-r
> > armv7-m neon hard +MULTILIB_OPTIONS  = mthumb
> > march=armv6-m/march=armv7-a/march=armv7-r/march=armv7-m
> > mfpu=neon/mfpu=vfpv3-d16 mfloat-abi=hard +MULTILIB_DIRNAMES = thumb
> > armv6-m armv7-a armv7-r armv7-m neon fpu hard +
> > +# Include big-endian support
> > +
> > +MULTILIB_OPTIONS  += mbig-endian
> > +MULTILIB_DIRNAMES += eb
> >
> >   # Enumeration of multilibs
> >
> >   MULTILIB_EXCEPTIONS =
> >   MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=neon/mfloat-abi=hard
> > +MULTILIB_EXCEPTIONS +=
> > mthumb/march=armv6-m/mfpu=vfpv3-d16/mfloat-abi=hard MULTILIB_EXCEPTIONS
> > += mthumb/march=armv6-m/mfpu=neon
> > +MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=vfpv3-d16
> >   MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfloat-abi=hard
...