[rtems commit] bsps/arm: Enable L2C for Cortex-A9 MPCore BSPs

Sebastian Huber sebastian.huber at embedded-brains.de
Fri Nov 21 07:31:45 UTC 2014


On 21/11/14 06:10, Chris Johns wrote:
> On 21/11/2014 12:53 am, Sebastian Huber wrote:
>> Module:    rtems
>> Branch:    master
>> Commit:    50440c065e247899ee739d56cb1392c259289031
>> Changeset: 
>> http://git.rtems.org/rtems/commit/?id=50440c065e247899ee739d56cb1392c259289031 
>>
>>
>> Author:    Sebastian Huber <sebastian.huber at embedded-brains.de>
>> Date:      Wed Nov 19 15:30:24 2014 +0100
>>
>> bsps/arm: Enable L2C for Cortex-A9 MPCore BSPs
>>
>> ---
>>
>> +RTEMS_BSPOPTS_SET([BSP_DATA_CACHE_ENABLED],[*],[1])
>> +RTEMS_BSPOPTS_HELP([BSP_DATA_CACHE_ENABLED],[enable data cache])
>> +
>> +RTEMS_BSPOPTS_SET([BSP_INSTRUCTION_CACHE_ENABLED],[*],[1])
>> +RTEMS_BSPOPTS_HELP([BSP_INSTRUCTION_CACHE_ENABLED],[enable 
>> instruction cache])
>> +
>
> To disable I provide configure with:
>
>  BSP_DATA_CACHE_ENABLED=0 BSP_INSTRUCTION_CACHE_ENABLED=0
>
> however this:
>
>> +#if defined(BSP_DATA_CACHE_ENABLED) || 
>> defined(BSP_INSTRUCTION_CACHE_ENABLED)
>> +    /* Enable unified L2 cache */
>> +    rtems_cache_enable_data();
>> +#endif
>
> and this:
>
>> +#if !defined(RTEMS_SMP) \
>> +  && (defined(BSP_DATA_CACHE_ENABLED) \
>> +    || defined(BSP_INSTRUCTION_CACHE_ENABLED))
>> +  /* Enable unified L2 cache */
>> +  rtems_cache_enable_data();
>> +#endif
>
> only check for defined and it is always defined. These should check 
> for the value only ie:
>
> #if BSP_DATA_CACHE_ENABLED || BSP_INSTRUCTION_CACHE_ENABLED
>
> ?

You should use

BSP_DATA_CACHE_ENABLED= BSP_INSTRUCTION_CACHE_ENABLED=

for the configure.

>
> This is not the only case of BSPOPTS'less'ness we have in RTEMS but 
> this one is an issue for me. Have I told you recently how much I 
> dislike the BSPOPTS support.

Yes, I know, but what is the alternative?  These defines are already 
used for a lot of PowerPC BSPs and I don't think it is good to invent 
yet another solution for the same problem on ARM.


>
> FYI the L2 cache seems to have upset OpenOCD and breakpoints. They are 
> now stopdeadpoints and once hit you never leave. 

-- 
Sebastian Huber, embedded brains GmbH

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