[PATCH 1/3] SPARC BSPs: added CPU aware interrupt ctrl operations
Daniel Hellstrom
daniel at gaisler.com
Tue Oct 7 09:10:44 UTC 2014
The LEON2 and ERC32 maps the new macros to CPU0 since they do not
support SMP. With the LEON3 a specific CPU's interrupt controller
registers can be modified using macros.
---
c/src/lib/libbsp/sparc/erc32/include/erc32.h | 14 ++++++-
c/src/lib/libbsp/sparc/leon2/include/leon.h | 12 ++++++
c/src/lib/libbsp/sparc/leon3/include/leon.h | 52 ++++++++++++++++++++------
3 files changed, 65 insertions(+), 13 deletions(-)
diff --git a/c/src/lib/libbsp/sparc/erc32/include/erc32.h b/c/src/lib/libbsp/sparc/erc32/include/erc32.h
index f3eb293..7db4a6c 100644
--- a/c/src/lib/libbsp/sparc/erc32/include/erc32.h
+++ b/c/src/lib/libbsp/sparc/erc32/include/erc32.h
@@ -405,7 +405,7 @@ static __inline__ int bsp_irq_fixup(int irq)
sparc_enable_interrupts( _level ); \
} while (0)
-/* Make all SPARC BSPs have common macros for interrupt handling */
+/* Make all SPARC BSPs have common macros for interrupt handling on local CPU */
#define BSP_Clear_interrupt(_source) ERC32_Clear_interrupt(_source)
#define BSP_Force_interrupt(_source) ERC32_Force_interrupt(_source)
#define BSP_Is_interrupt_pending(_source) ERC32_Is_interrupt_pending(_source)
@@ -417,6 +417,18 @@ static __inline__ int bsp_irq_fixup(int irq)
#define BSP_Restore_interrupt(_source, _previous) \
ERC32_Restore_interrupt(_source, _previous)
+/* Make all SPARC BSPs have common macros for interrupt handling on any CPU */
+#define BSP_Cpu_Is_interrupt_masked(_source, _cpu) \
+ BSP_Is_interrupt_masked(_source)
+#define BSP_Cpu_Unmask_interrupt(_source, _cpu) \
+ BSP_Unmask_interrupt(_source)
+#define BSP_Cpu_Mask_interrupt(_source, _cpu) \
+ BSP_Mask_interrupt(_source)
+#define BSP_Cpu_Disable_interrupt(_source, _previous, _cpu) \
+ BSP_Disable_interrupt(_source, _prev)
+#define BSP_Cpu_Restore_interrupt(_source, _previous, _cpu) \
+ BSP_Cpu_Restore_interrupt(_source, _previous)
+
/*
* The following macros attempt to hide the fact that the General Purpose
* Timer and Real Time Clock Timer share the Timer Control Register. Because
diff --git a/c/src/lib/libbsp/sparc/leon2/include/leon.h b/c/src/lib/libbsp/sparc/leon2/include/leon.h
index 25826bd..8d2f0c5 100644
--- a/c/src/lib/libbsp/sparc/leon2/include/leon.h
+++ b/c/src/lib/libbsp/sparc/leon2/include/leon.h
@@ -362,6 +362,18 @@ static __inline__ int bsp_irq_fixup(int irq)
#define BSP_Restore_interrupt(_source, _previous) \
LEON_Restore_interrupt(_source, _previous)
+/* Make all SPARC BSPs have common macros for interrupt handling on any CPU */
+#define BSP_Cpu_Is_interrupt_masked(_source, _cpu) \
+ BSP_Is_interrupt_masked(_source)
+#define BSP_Cpu_Unmask_interrupt(_source, _cpu) \
+ BSP_Unmask_interrupt(_source)
+#define BSP_Cpu_Mask_interrupt(_source, _cpu) \
+ BSP_Mask_interrupt(_source)
+#define BSP_Cpu_Disable_interrupt(_source, _previous, _cpu) \
+ BSP_Disable_interrupt(_source, _prev)
+#define BSP_Cpu_Restore_interrupt(_source, _previous, _cpu) \
+ BSP_Cpu_Restore_interrupt(_source, _previous)
+
/*
* Each timer control register is organized as follows:
*
diff --git a/c/src/lib/libbsp/sparc/leon3/include/leon.h b/c/src/lib/libbsp/sparc/leon3/include/leon.h
index 46e3071..a2fb302 100644
--- a/c/src/lib/libbsp/sparc/leon3/include/leon.h
+++ b/c/src/lib/libbsp/sparc/leon3/include/leon.h
@@ -156,48 +156,64 @@ extern rtems_interrupt_lock LEON3_IrqCtrl_Lock;
#define LEON_Is_interrupt_pending( _source ) \
(LEON3_IrqCtrl_Regs->ipend & (1 << (_source)))
-#define LEON_Is_interrupt_masked( _source ) \
+#define LEON_Cpu_Is_interrupt_masked( _source, _cpu ) \
do {\
- (LEON3_IrqCtrl_Regs->mask[LEON3_Cpu_Index] & (1 << (_source))); \
+ (LEON3_IrqCtrl_Regs->mask[_cpu] & (1 << (_source))); \
} while (0)
-#define LEON_Mask_interrupt( _source ) \
+#define LEON_Cpu_Mask_interrupt( _source, _cpu ) \
do { \
rtems_interrupt_lock_context _lock_context; \
LEON3_IRQCTRL_ACQUIRE( &_lock_context ); \
- LEON3_IrqCtrl_Regs->mask[LEON3_Cpu_Index] &= ~(1 << (_source)); \
+ LEON3_IrqCtrl_Regs->mask[_cpu] &= ~(1 << (_source)); \
LEON3_IRQCTRL_RELEASE( &_lock_context ); \
} while (0)
-#define LEON_Unmask_interrupt( _source ) \
+#define LEON_Cpu_Unmask_interrupt( _source, _cpu ) \
do { \
rtems_interrupt_lock_context _lock_context; \
LEON3_IRQCTRL_ACQUIRE( &_lock_context ); \
- LEON3_IrqCtrl_Regs->mask[LEON3_Cpu_Index] |= (1 << (_source)); \
+ LEON3_IrqCtrl_Regs->mask[_cpu] |= (1 << (_source)); \
LEON3_IRQCTRL_RELEASE( &_lock_context ); \
} while (0)
-#define LEON_Disable_interrupt( _source, _previous ) \
+#define LEON_Cpu_Disable_interrupt( _source, _previous, _cpu ) \
do { \
rtems_interrupt_lock_context _lock_context; \
uint32_t _mask = 1 << (_source); \
LEON3_IRQCTRL_ACQUIRE( &_lock_context ); \
- (_previous) = LEON3_IrqCtrl_Regs->mask[LEON3_Cpu_Index]; \
- LEON3_IrqCtrl_Regs->mask[LEON3_Cpu_Index] = _previous & ~_mask; \
+ (_previous) = LEON3_IrqCtrl_Regs->mask[_cpu]; \
+ LEON3_IrqCtrl_Regs->mask[_cpu] = _previous & ~_mask; \
LEON3_IRQCTRL_RELEASE( &_lock_context ); \
(_previous) &= _mask; \
} while (0)
-#define LEON_Restore_interrupt( _source, _previous ) \
+#define LEON_Cpu_Restore_interrupt( _source, _previous, _cpu ) \
do { \
rtems_interrupt_lock_context _lock_context; \
uint32_t _mask = 1 << (_source); \
LEON3_IRQCTRL_ACQUIRE( &_lock_context ); \
- LEON3_IrqCtrl_Regs->mask[LEON3_Cpu_Index] = \
- (LEON3_IrqCtrl_Regs->mask[LEON3_Cpu_Index] & ~_mask) | (_previous); \
+ LEON3_IrqCtrl_Regs->mask[_cpu] = \
+ (LEON3_IrqCtrl_Regs->mask[_cpu] & ~_mask) | (_previous); \
LEON3_IRQCTRL_RELEASE( &_lock_context ); \
} while (0)
+/* Map single-cpu operations to local CPU */
+#define LEON_Is_interrupt_masked( _source ) \
+ LEON_Cpu_Is_interrupt_masked(_source, _LEON3_Get_current_processor())
+
+#define LEON_Mask_interrupt(_source) \
+ LEON_Cpu_Mask_interrupt(_source, _LEON3_Get_current_processor())
+
+#define LEON_Unmask_interrupt(_source) \
+ LEON_Cpu_Unmask_interrupt(_source, _LEON3_Get_current_processor())
+
+#define LEON_Disable_interrupt(_source, _previous) \
+ LEON_Cpu_Disable_interrupt(_source, _previous, _LEON3_Get_current_processor())
+
+#define LEON_Restore_interrupt(_source, _previous) \
+ LEON_Cpu_Restore_interrupt(_source, _previous, _LEON3_Get_current_processor())
+
/* Make all SPARC BSPs have common macros for interrupt handling */
#define BSP_Clear_interrupt(_source) LEON_Clear_interrupt(_source)
#define BSP_Force_interrupt(_source) LEON_Force_interrupt(_source)
@@ -210,6 +226,18 @@ extern rtems_interrupt_lock LEON3_IrqCtrl_Lock;
#define BSP_Restore_interrupt(_source, _previous) \
LEON_Restore_interrupt(_source, _previous)
+/* Make all SPARC BSPs have common macros for interrupt handling on any CPU */
+#define BSP_Cpu_Is_interrupt_masked(_source, _cpu) \
+ LEON_Cpu_Is_interrupt_masked(_source, _cpu)
+#define BSP_Cpu_Unmask_interrupt(_source, _cpu) \
+ LEON_Cpu_Unmask_interrupt(_source, _cpu)
+#define BSP_Cpu_Mask_interrupt(_source, _cpu) \
+ LEON_Cpu_Mask_interrupt(_source, _cpu)
+#define BSP_Cpu_Disable_interrupt(_source, _previous, _cpu) \
+ LEON_Cpu_Disable_interrupt(_source, _prev, _cpu)
+#define BSP_Cpu_Restore_interrupt(_source, _previous, _cpu) \
+ LEON_Cpu_Restore_interrupt(_source, _previous, _cpu)
+
/*
* Each timer control register is organized as follows:
*
--
1.7.0.4
More information about the devel
mailing list