[PATCH] sparc/leon2: Fix warnings

Joel Sherrill joel.sherrill at oarcorp.com
Mon Oct 13 19:26:49 UTC 2014


Ignore this. It is already merged. I found it on a branch
on another machine and thought I hadn't moved it to
the build machine I was working patches from.

--joel
On 10/13/2014 2:25 PM, Joel Sherrill wrote:
> ---
>  c/src/lib/libbsp/sparc/leon2/cchip/cchip.c         |   13 +++++---
>  c/src/lib/libbsp/sparc/leon2/console/console.c     |    8 +++---
>  c/src/lib/libbsp/sparc/leon2/console/debugputs.c   |    6 ++++
>  c/src/lib/libbsp/sparc/leon2/include/bsp.h         |    6 +++-
>  .../sparc/leon2/leon_open_eth/leon_open_eth.c      |    8 +++---
>  c/src/lib/libbsp/sparc/leon2/pci/pci.c             |   28 ++++++++++---------
>  c/src/lib/libbsp/sparc/leon2/rasta/rasta.c         |    9 +++---
>  .../lib/libbsp/sparc/leon2/startup/bsppredriver.c  |    7 +----
>  c/src/lib/libbsp/sparc/shared/can/grcan_rasta.c    |    1 +
>  c/src/lib/libbsp/sparc/shared/spw/grspw_rasta.c    |    7 +++-
>  c/src/lib/libbsp/sparc/shared/uart/apbuart_rasta.c |    2 +
>  11 files changed, 56 insertions(+), 39 deletions(-)
>
> diff --git a/c/src/lib/libbsp/sparc/leon2/cchip/cchip.c b/c/src/lib/libbsp/sparc/leon2/cchip/cchip.c
> index 09d8a4c..72419d5 100644
> --- a/c/src/lib/libbsp/sparc/leon2/cchip/cchip.c
> +++ b/c/src/lib/libbsp/sparc/leon2/cchip/cchip.c
> @@ -92,7 +92,7 @@ typedef struct {
>    amba_bridge_regs *ambab;
>  
>    /* AT697 PCI */
> -  unsigned int bars[5];
> +  uint32_t bars[5];
>    int bus, dev, fun;
>  
>    /* AMBA bus */
> @@ -108,8 +108,9 @@ typedef struct {
>  
>  cchip1 cc1;
>  
> -int init_pcif(void){
> -  unsigned int com1;
> +static int init_pcif(void)
> +{
> +  uint32_t com1;
>    int i,bus,dev,fun;
>    pci_bridge_regs *pcib;
>    amba_bridge_regs *ambab;
> @@ -202,7 +203,8 @@ int init_pcif(void){
>  #ifndef GAISLER_FTAHBRAM
>   #define GAISLER_FTAHBRAM 0x50
>  #endif
> -int init_onboard_sram(void){
> +static int init_onboard_sram(void)
> +{
>    struct ambapp_ahb_info ahb;
>    struct ambapp_apb_info apb;
>    unsigned int conf, size;
> @@ -241,7 +243,8 @@ int init_onboard_sram(void){
>    return 0;
>  }
>  
> -int cchip1_register(void){
> +int cchip1_register(void)
> +{
>  
>    /* Init AT697 PCI Controller */
>    init_pci();
> diff --git a/c/src/lib/libbsp/sparc/leon2/console/console.c b/c/src/lib/libbsp/sparc/leon2/console/console.c
> index cac21a6..36f6a8c 100644
> --- a/c/src/lib/libbsp/sparc/leon2/console/console.c
> +++ b/c/src/lib/libbsp/sparc/leon2/console/console.c
> @@ -26,10 +26,9 @@
>   *
>   *  This routine transmits a character using polling.
>   */
> -
>  void console_outbyte_polled(
> -  int  port,
> -  char ch
> +  int           port,
> +  unsigned char ch
>  );
>  
>  /* body is in debugputs.c */
> @@ -274,7 +273,7 @@ void console_outbyte_interrupt(
>   *
>   */
>  
> -ssize_t console_write_support (int minor, const char *buf, size_t len)
> +static ssize_t console_write_support (int minor, const char *buf, size_t len)
>  {
>    int nwrite = 0;
>  
> @@ -375,6 +374,7 @@ rtems_device_driver console_open(
>  #else
>    sc = rtems_termios_open (major, minor, arg, &pollCallbacks);
>  #endif
> +  (void) sc; /* avoid set but not used warning */
>  
>    return RTEMS_SUCCESSFUL;
>  }
> diff --git a/c/src/lib/libbsp/sparc/leon2/console/debugputs.c b/c/src/lib/libbsp/sparc/leon2/console/debugputs.c
> index 4de2afc..fe9b3dd 100644
> --- a/c/src/lib/libbsp/sparc/leon2/console/debugputs.c
> +++ b/c/src/lib/libbsp/sparc/leon2/console/debugputs.c
> @@ -23,6 +23,12 @@
>  #include <assert.h>
>  
>  /*
> + *  Method is shared with console.c
> + */
> +void console_outbyte_polled( int port, unsigned char ch );
> +int console_inbyte_nonblocking( int port );
> +
> +/*
>   *  console_outbyte_polled
>   *
>   *  This routine transmits a character using polling.
> diff --git a/c/src/lib/libbsp/sparc/leon2/include/bsp.h b/c/src/lib/libbsp/sparc/leon2/include/bsp.h
> index 1943baf..9a519e4 100644
> --- a/c/src/lib/libbsp/sparc/leon2/include/bsp.h
> +++ b/c/src/lib/libbsp/sparc/leon2/include/bsp.h
> @@ -79,7 +79,7 @@ extern int rtems_smc91111_driver_attach_leon2(
>  
>  /* Configure GRETH driver */
>  #define GRETH_SUPPORTED
> -#define GRETH_MEM_LOAD(addr) leon_r32_no_cache(addr)
> +#define GRETH_MEM_LOAD(addr) leon_r32_no_cache((uintptr_t) addr)
>  
>  /*
>   *  The synchronous trap is an arbitrarily chosen software trap.
> @@ -197,6 +197,10 @@ extern void BSP_shared_interrupt_unmask(int irq);
>   */
>  extern void BSP_shared_interrupt_mask(int irq);
>  
> +/*
> + * Delat method
> + */
> +void rtems_bsp_delay(int usecs);
>  #ifdef __cplusplus
>  }
>  #endif
> diff --git a/c/src/lib/libbsp/sparc/leon2/leon_open_eth/leon_open_eth.c b/c/src/lib/libbsp/sparc/leon2/leon_open_eth/leon_open_eth.c
> index e55c5be..ae0e805 100644
> --- a/c/src/lib/libbsp/sparc/leon2/leon_open_eth/leon_open_eth.c
> +++ b/c/src/lib/libbsp/sparc/leon2/leon_open_eth/leon_open_eth.c
> @@ -28,7 +28,7 @@
>  /*
>   * Default location of device registers
>   */
> -#define OPEN_ETH_BASE_ADDRESS 0xb0000000
> +#define OPEN_ETH_BASE_ADDRESS ((void *)0xb0000000)
>  
>  /*
>   * Default interrupt vector
> @@ -36,11 +36,11 @@
>  #define OPEN_ETH_VECTOR 0x1C
>  
>  open_eth_configuration_t leon_open_eth_configuration = {
> -  OPEN_ETH_BASE_ADDRESS,        /* base address */
> -  OPEN_ETH_VECTOR,              /* vector number */
> +  OPEN_ETH_BASE_ADDRESS,     /* base address */
> +  OPEN_ETH_VECTOR,           /* vector number */
>    TDA_COUNT,                 /* number of transmit descriptors */
>    RDA_COUNT,                 /* number of receive descriptors */
> -  0                   /* 100 MHz operation */
> +  0                          /* 100 MHz operation */
>  };
>  
>  int rtems_leon_open_eth_driver_attach(struct rtems_bsdnet_ifconfig *config)
> diff --git a/c/src/lib/libbsp/sparc/leon2/pci/pci.c b/c/src/lib/libbsp/sparc/leon2/pci/pci.c
> index f34a173..bf1cd32 100644
> --- a/c/src/lib/libbsp/sparc/leon2/pci/pci.c
> +++ b/c/src/lib/libbsp/sparc/leon2/pci/pci.c
> @@ -136,9 +136,9 @@ struct pci_res {
>  
>  static int
>  BSP_pci_read_config_dword(unsigned char bus, unsigned char slot,
> -    unsigned char function, unsigned char offset, unsigned int *val) {
> +    unsigned char function, unsigned char offset, uint32_t *val) {
>  
> -    volatile unsigned int data;
> +    volatile uint32_t data;
>  
>      if (offset & 3) return PCIBIOS_BAD_REGISTER_NUMBER;
>  
> @@ -171,7 +171,7 @@ BSP_pci_read_config_dword(unsigned char bus, unsigned char slot,
>  static int
>  BSP_pci_read_config_word(unsigned char bus, unsigned char slot,
>      unsigned char function, unsigned char offset, unsigned short *val) {
> -    unsigned int v;
> +    uint32_t v;
>  
>      if (offset & 1) return PCIBIOS_BAD_REGISTER_NUMBER;
>  
> @@ -185,7 +185,7 @@ BSP_pci_read_config_word(unsigned char bus, unsigned char slot,
>  static int
>  BSP_pci_read_config_byte(unsigned char bus, unsigned char slot,
>      unsigned char function, unsigned char offset, unsigned char *val) {
> -    unsigned int v;
> +    uint32_t v;
>  
>      pci_read_config_dword(bus, slot, function, offset&~3, &v);
>  
> @@ -197,7 +197,7 @@ BSP_pci_read_config_byte(unsigned char bus, unsigned char slot,
>  
>  static int
>  BSP_pci_write_config_dword(unsigned char bus, unsigned char slot,
> -    unsigned char function, unsigned char offset, unsigned int val) {
> +    unsigned char function, unsigned char offset, uint32_t val) {
>  
>      if (offset & 3) return PCIBIOS_BAD_REGISTER_NUMBER;
>  
> @@ -227,7 +227,7 @@ BSP_pci_write_config_dword(unsigned char bus, unsigned char slot,
>  static int
>  BSP_pci_write_config_word(unsigned char bus, unsigned char slot,
>      unsigned char function, unsigned char offset, unsigned short val) {
> -    unsigned int v;
> +    uint32_t v;
>  
>      if (offset & 1) return PCIBIOS_BAD_REGISTER_NUMBER;
>  
> @@ -242,7 +242,7 @@ BSP_pci_write_config_word(unsigned char bus, unsigned char slot,
>  static int
>  BSP_pci_write_config_byte(unsigned char bus, unsigned char slot,
>      unsigned char function, unsigned char offset, unsigned char val) {
> -    unsigned int v;
> +    uint32_t v;
>  
>      pci_read_config_dword(bus, slot, function, offset&~3, &v);
>  
> @@ -295,7 +295,8 @@ static void init_at697_pci(void) {
>  }
>  
>  /* May not pass a 1k boundary */
> -int dma_from_pci_1k(unsigned int addr, unsigned int paddr, unsigned char len) {
> +static int dma_from_pci_1k(
> +  unsigned int addr, unsigned int paddr, unsigned char len) {
>  
>      int retval = 0;
>  
> @@ -327,7 +328,8 @@ int dma_from_pci_1k(unsigned int addr, unsigned int paddr, unsigned char len) {
>  }
>  
>  /* May not pass a 1k boundary */
> -int dma_to_pci_1k(unsigned int addr, unsigned int paddr, unsigned char len) {
> +static int dma_to_pci_1k(
> +  unsigned int addr, unsigned int paddr, unsigned char len) {
>  
>      int retval = 0;
>  
> @@ -425,7 +427,7 @@ int dma_from_pci(unsigned int addr, unsigned int paddr, unsigned int len) {
>  
>  void pci_mem_enable(unsigned char bus, unsigned char slot,
>      unsigned char function) {
> -    unsigned int data;
> +    uint32_t data;
>  
>      pci_read_config_dword(0, slot, function, PCI_COMMAND, &data);
>      pci_write_config_dword(0, slot, function, PCI_COMMAND,
> @@ -435,7 +437,7 @@ void pci_mem_enable(unsigned char bus, unsigned char slot,
>  
>  void pci_master_enable(unsigned char bus, unsigned char slot,
>      unsigned char function) {
> -    unsigned int data;
> +    uint32_t data;
>  
>      pci_read_config_dword(0, slot, function, PCI_COMMAND, &data);
>      pci_write_config_dword(0, slot, function, PCI_COMMAND,
> @@ -464,7 +466,7 @@ static inline void swap_res(struct pci_res **p1, struct pci_res **p2) {
>   */
>  static void pci_allocate_resources(void) {
>  
> -    unsigned int slot, numfuncs, func, id, pos, size, tmp;
> +    uint32_t slot, numfuncs, func, id, pos, size, tmp;
>      unsigned int i, swapped, addr, dev, fn;
>      unsigned char header;
>      struct pci_res **res;
> @@ -648,7 +650,7 @@ int init_pci(void)
>      unsigned char ucSlotNumber, ucFnNumber, ucNumFuncs;
>      unsigned char ucHeader;
>      unsigned char ucMaxSubordinate;
> -    unsigned int  ulClass, ulDeviceID;
> +    uint32_t      ulClass, ulDeviceID;
>  
>      init_at697_pci();
>      pci_allocate_resources();
> diff --git a/c/src/lib/libbsp/sparc/leon2/rasta/rasta.c b/c/src/lib/libbsp/sparc/leon2/rasta/rasta.c
> index 424f4ca..bfd9e31 100644
> --- a/c/src/lib/libbsp/sparc/leon2/rasta/rasta.c
> +++ b/c/src/lib/libbsp/sparc/leon2/rasta/rasta.c
> @@ -126,7 +126,7 @@ static rtems_isr rasta_interrupt_handler (rtems_vector_number v)
>  
>  }
>  
> -void rasta_interrrupt_register(void *handler, int irqno, void *arg)
> +static void rasta_interrrupt_register(void *handler, int irqno, void *arg)
>  {
>    DBG("RASTA: Registering irq %d\n",irqno);
>    if ( irqno == UART0_IRQNO ){
> @@ -201,8 +201,9 @@ void rasta_interrrupt_register(void *handler, int irqno, void *arg)
>  }
>  
>  
> -int rasta_get_gpio(struct ambapp_bus *abus, int index, struct gpio_reg **regs,
> -                   int *irq)
> +static int rasta_get_gpio(
> +  struct ambapp_bus *abus, int index, struct gpio_reg **regs,
> +  int *irq)
>  {
>    struct ambapp_apb_info dev;
>    int cores;
> @@ -231,7 +232,7 @@ static struct ambapp_mmap amba_maps[3];
>  
>  int rasta_register(void)
>  {
> -    unsigned int bar0, bar1, data;
> +    uint32_t bar0, bar1, data;
>  
>      unsigned int *page0 = NULL;
>      unsigned int *apb_base = NULL;
> diff --git a/c/src/lib/libbsp/sparc/leon2/startup/bsppredriver.c b/c/src/lib/libbsp/sparc/leon2/startup/bsppredriver.c
> index 237eb24..58493df 100644
> --- a/c/src/lib/libbsp/sparc/leon2/startup/bsppredriver.c
> +++ b/c/src/lib/libbsp/sparc/leon2/startup/bsppredriver.c
> @@ -15,13 +15,8 @@
>   */
>  
>  #include <bsp.h>
> +#include <bsp/bootcard.h>
>  
> -/*
> - *  bsp_predriver_hook
> - *
> - *  BSP predriver hook. Called just before drivers are initialized.
> - *  Is used to initialize shared interrupt handling.
> - */
>  void bsp_predriver_hook( void )
>  {
>    /* Initialize shared interrupt handling, must be done after IRQ
> diff --git a/c/src/lib/libbsp/sparc/shared/can/grcan_rasta.c b/c/src/lib/libbsp/sparc/shared/can/grcan_rasta.c
> index 5f7257a..8832e09 100644
> --- a/c/src/lib/libbsp/sparc/shared/can/grcan_rasta.c
> +++ b/c/src/lib/libbsp/sparc/shared/can/grcan_rasta.c
> @@ -1,4 +1,5 @@
>  #include <rasta.h>
> +#include <grcan_rasta.h>
>  
>  /* PCI frequency */
>  #define SYS_FREQ_HZ 30000000
> diff --git a/c/src/lib/libbsp/sparc/shared/spw/grspw_rasta.c b/c/src/lib/libbsp/sparc/shared/spw/grspw_rasta.c
> index 9bf9437..b76d46a 100644
> --- a/c/src/lib/libbsp/sparc/shared/spw/grspw_rasta.c
> +++ b/c/src/lib/libbsp/sparc/shared/spw/grspw_rasta.c
> @@ -1,3 +1,6 @@
> +#include <rtems.h>
> +#include <grspw_rasta.h>
> +
>  /* Select PCI driver */
>  #define GRSPW_PCI
>  
> @@ -74,7 +77,7 @@ void (*grspw_rasta_int_reg)(void *handler, int irq, void *arg) = 0;
>  static int grspw_rasta_calc_memoffs(int maxcores, int corenum, unsigned int *mem_base, unsigned int *mem_end, unsigned int *bdtable_base);
>  #endif
>  
> -int grspw_rasta_interrupt_handler(unsigned int status);
> +void grspw_rasta_interrupt_handler(unsigned int status);
>  
>  void grspwrasta_interrupt_handler(int irq, void *pDev);
>  
> @@ -106,7 +109,7 @@ int grspw_rasta_register(
>   * which GRSPW core was responsible for the IRQ (may be multiple).
>   * v = status of the PCI/AMBA MCPU IRQ CTRL
>   */
> -int grspw_rasta_interrupt_handler(unsigned int status)
> +void grspw_rasta_interrupt_handler(unsigned int status)
>  {
>          int minor;
>  
> diff --git a/c/src/lib/libbsp/sparc/shared/uart/apbuart_rasta.c b/c/src/lib/libbsp/sparc/shared/uart/apbuart_rasta.c
> index 349a9c5..f6d561e 100644
> --- a/c/src/lib/libbsp/sparc/shared/uart/apbuart_rasta.c
> +++ b/c/src/lib/libbsp/sparc/shared/uart/apbuart_rasta.c
> @@ -1,5 +1,7 @@
>  #undef DEBUG
>  
> +#include <apbuart_rasta.h>
> +
>  /* Set registered device name */
>  #define APBUART_DEVNAME "/dev/apburasta0"
>  #define APBUART_DEVNAME_NO(devstr,no) ((devstr)[14]='0'+(no))

-- 
Joel Sherrill, Ph.D.             Director of Research & Development
joel.sherrill at OARcorp.com        On-Line Applications Research
Ask me about RTEMS: a free RTOS  Huntsville AL 35805
Support Available                (256) 722-9985



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