[PATCH 2/3 v2] LEON3 SMP: support static interrupt affinity

Sebastian Huber sebastian.huber at embedded-brains.de
Thu Oct 9 09:13:11 UTC 2014


On 08/10/14 15:49, Daniel Hellstrom wrote:
> +#ifdef RTEMS_SMP
> +/* Weak table used to implement static interrupt CPU affinity in a SMP
> + * configuration. The array index is the interrupt to be looked up, and
> + * the array[INTERRUPT] content is the CPU number relative to boot CPU
> + * index that will be servicing the interrupts from the IRQ source. The
> + * default is to let the first CPU (the boot cpu) to handle all
> + * interrupts (all zeros).
> + */
> +extern unsigned char sparc_irq_to_cpu[32];
> +#endif

I am not so fond of adding BSP specific solutions to deal with the interrupt 
processor affinity.

I would rather enhance the interrupt manager extension API:

http://www.rtems.org/wiki/index.php?title=SMP#Interrupt_Support_2

http://www.rtems.org/onlinedocs/doxygen/cpukit/html/group__rtems__interrupt__extension.html

-- 
Sebastian Huber, embedded brains GmbH

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