MSc (by research) involving RTEMS | University of York

[Joel Sherrill]

On October 27, 2014 3:04:26 AM PDT, Hesham Moustafa <heshamelmatary at gmail.com> wrote:
>Hi all,
>
>
>This year, I am studying MSc (by research) degree at the University of
>York. My thesis proposal title is "REAL-TIME OPERATING SYSTEMS FOR
>LARGE SCALE MANY-CORE NETWORK-ON-CHIP ARCHITECTURES." Part of this
>research will include some work with RTEMS. 
>

Awesome!

There is an asymmetric MP patch filed with a PR in bugzilla. I don't remember the architecture but it was a proprietary CPU with virtually nothing useful publicly available. The company was Kalray and here is a link to one of their patches.

http://lists.rtems.org/pipermail/bugs/2011-October/003376.html

We merged some small stuff from them but they did not work in an open collaborative way with the community. They have a commercial product with a mesh of multi core instances. I suspect the key folks have published papers. Assuming that is vaguely related.

How many is many? 16, 64,  etc.. Can you point to some example architectures?


>That said, I'd appreciate any materials (papers, publications,
>references, tutorials, etc) that might be of help regarding that topic
>and may or may not relate to RTEMS. I think Sebastian has contributed a
>lot to this area recently.

Gedare and Sebastian are more in tune with the paper side of things. 

My suggestion is to divide it into areas. Of the top of my head, there are issues with algorithm scaling as the number of cores increases, locking issues, more need for finer grain locks and lockless data structures, and likely on the application side means to debug and formally make statements about WCET, end to end scheduling correctness in a way that is known to be analyzable for schedulability and correctness, and cache effects.


RTEMS will face the same challenges Solaris, Linux etc faced as the number of cores grew beyond four. So there may be useful experience papers from those.

>You may also want to suggest building some simple multi-processor
>and/or many-core systems that RTEMS currently supports, and how to
>simulate them.

Tile may be interesting but you need to look. There should be 12-16 core qoriq ppc by now and qemu might be up to that.
Maestro (I think) was a MIPS based SOC out of AFRL which might be interesting. 

But how many is "many" and me being at my desk will help. I just core dumped in an airport at 5am. 

What do you want the code to do? 

>
>Thanks,
>
>Hesham