[PATCH 1/2] GPIO driver for BBB
Ketul Shah
ketulshah1993 at gmail.com
Tue Aug 11 10:01:13 UTC 2015
---
c/src/lib/libbsp/arm/beagle/Makefile.am | 6 +
c/src/lib/libbsp/arm/beagle/gpio/bbb-gpio.c | 468 +++++++++++++++++++++
c/src/lib/libbsp/arm/beagle/include/bbb-gpio.h | 43 ++
.../libbsp/arm/beagle/include/beagleboneblack.h | 72 ++++
c/src/lib/libbsp/arm/beagle/include/bsp.h | 7 +
c/src/lib/libbsp/arm/beagle/preinstall.am | 8 +
c/src/lib/libcpu/arm/shared/include/am335x.h | 169 +++++++
7 files changed, 772 insertions
create mode 100644 c/src/lib/libbsp/arm/beagle/gpio/bbb-gpio.c
create mode 100644 c/src/lib/libbsp/arm/beagle/include/bbb-gpio.h
create mode 100644 c/src/lib/libbsp/arm/beagle/include/beagleboneblack.h
diff --git a/c/src/lib/libbsp/arm/beagle/Makefile.am b/c/src/lib/libbsp/arm/beagle/Makefile.am
index aa96294..1098248 100644
--- a/c/src/lib/libbsp/arm/beagle/Makefile.am
+++ b/c/src/lib/libbsp/arm/beagle/Makefile.am
@@ -39,6 +39,8 @@ include_bsp_HEADERS += ../shared/include/arm-release-id.h
include_bsp_HEADERS += ../shared/include/start.h
include_bsp_HEADERS += include/irq.h
include_bsp_HEADERS += include/i2c.h
+include_bsp_HEADERS += include/beagleboneblack.h
+include_bsp_HEADERS += include/bbb-gpio.h
include_libcpu_HEADERS =
include_libcpu_HEADERS += ../../../libcpu/arm/shared/include/arm-cp15.h
@@ -82,6 +84,7 @@ libbsp_a_SOURCES += ../../shared/bsppretaskinghook.c
libbsp_a_SOURCES += ../../shared/gnatinstallhandler.c
libbsp_a_SOURCES += ../../shared/sbrk.c
libbsp_a_SOURCES += ../../shared/src/stackalloc.c
+libbsp_a_SOURCES += ../../shared/gpio.c
libbsp_a_SOURCES += ../../shared/cpucounterdiff.c
libbsp_a_SOURCES += ../../shared/timerstub.c
libbsp_a_SOURCES += ../../shared/cpucounterread.c
@@ -114,6 +117,9 @@ libbsp_a_SOURCES += ../../shared/console.c \
# I2C
libbsp_a_SOURCES += misc/i2c.c
+# GPIO
+libbsp_a_SOURCES += gpio/bbb-gpio.c
+
#RTC
libbsp_a_SOURCES += rtc.c
libbsp_a_SOURCES += ../../shared/tod.c
diff --git a/c/src/lib/libbsp/arm/beagle/include/bbb-gpio.h b/c/src/lib/libbsp/arm/beagle/include/bbb-gpio.h
new file mode 100644
index 0000000..8cce556
--- /dev/null
+++ b/c/src/lib/libbsp/arm/beagle/include/bbb-gpio.h
@@ -0,0 +1,43 @@
+/**
+ * @file
+ *
+ * @ingroup arm_beagle
+ *
+ * @brief BeagleBone Black BSP definitions.
+ */
+
+/**
+ * Copyright (c) 2015 Ketul Shah <ketulshah1993 at gmail.com>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef LIBBSP_ARM_BEAGLE_BBB_GPIO_H
+#define LIBBSP_ARM_BEAGLE_BBB_GPIO_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/**
+ * @brief BeagleBone Black GPIO functions.
+ */
+#define BBB_DIGITAL_IN 2
+#define BBB_DIGITAL_OUT 1
+
+/**
+ * @brief BeagleBone Black GPIO pad configuration.
+ */
+#define BBB_PUDEN (1 << 3)
+#define BBB_PUDDIS ~BBB_PUDEN
+#define BBB_PU_EN (1 << 4)
+#define BBB_PD_EN ~BBB_PU_EN
+#define BBB_MUXMODE(X) (X & 0x7)
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* LIBBSP_ARM_BEAGLE_BBB_GPIO_H */
\ No newline at end of file
diff --git a/c/src/lib/libbsp/arm/beagle/include/beagleboneblack.h b/c/src/lib/libbsp/arm/beagle/include/beagleboneblack.h
new file mode 100644
index 0000000..c62f4aa
--- /dev/null
+++ b/c/src/lib/libbsp/arm/beagle/include/beagleboneblack.h
@@ -0,0 +1,72 @@
+/**
+ * @file
+ *
+ * @ingroup arm_beagle
+ *
+ * @brief BeagleBone Black BSP definitions.
+ */
+
+/**
+ * Copyright (c) 2015 Ketul Shah <ketulshah1993 at gmail.com>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef LIBBSP_ARM_BEAGLE_BEAGLEBONEBLACK_H
+#define LIBBSP_ARM_BEAGLE_BEAGLEBONEBLACK_H
+
+/* In general GPIOs of BeagleBone Black/White can be addressed
+ * using two 46-pin dual-row expansion connectors P9 and P8,
+ * which are also known as Expansion A and Expansion B Connectors,
+ * respectively.
+ *
+ * Each Expansion Connector consists of 23 pins. So 2x23 pins would
+ * be available. It has 4 GPIO Banks each consists of 32 pins each.
+ * Toatal number of pins are 128 (32x4).
+ *
+ * So for mapping between generalized pin name and the unique pin
+ * numbers in this header file Macros are declared.
+ */
+
+/* USER LEDs of BeagleBone Black */
+#define BBB_LED_USR0 53 /* USR LED0 */
+#define BBB_LED_USR1 54 /* USR LED1 */
+#define BBB_LED_USR2 55 /* USR LED2 */
+#define BBB_LED_USR3 56 /* USR LED3 */
+
+/* Header P8 of BeagleBone Black */
+#define BBB_P8_7 66 /* GPIO2_2 */
+#define BBB_P8_8 67 /* GPIO2_3 */
+#define BBB_P8_9 69 /* GPIO2_5 */
+#define BBB_P8_10 68 /* GPIO2_4 */
+#define BBB_P8_11 45 /* GPIO1_13 */
+#define BBB_P8_12 44 /* GPIO1_12 */
+#define BBB_P8_13 23 /* GPIO0_23 */
+#define BBB_P8_14 26 /* GPIO0_26 */
+#define BBB_P8_15 47 /* GPIO1_15 */
+#define BBB_P8_16 46 /* GPIO1_14 */
+#define BBB_P8_17 27 /* GPIO0_27 */
+#define BBB_P8_18 65 /* GPIO2_1 */
+#define BBB_P8_19 22 /* GPIO0_22 */
+#define BBB_P8_26 61 /* GPIO1_29 */
+
+/* Header P9 of BeagleBone Black */
+#define BBB_P9_11 30 /* GPIO0_30 */
+#define BBB_P9_12 60 /* GPIO1_28 */
+#define BBB_P9_13 31 /* GPIO0_31 */
+#define BBB_P9_14 50 /* GPIO1_18 */
+#define BBB_P9_15 48 /* GPIO1_16 */
+#define BBB_P9_16 51 /* GPIO1_19 */
+#define BBB_P9_17 5 /* GPIO0_5 */
+#define BBB_P9_18 4 /* GPIO0_4 */
+#define BBB_P9_23 49 /* GPIO1_17 */
+#define BBB_P9_24 15 /* GPIO0_15 */
+#define BBB_P9_26 14 /* GPIO1_14 */
+#define BBB_P9_27 115/* GPIO3_19 */
+#define BBB_P9_30 112/* GPIO3_16 */
+#define BBB_P9_41 20 /* GPIO0_20 */
+#define BBB_P9_42 7 /* GPIO0_7 */
+
+#endif /* LIBBSP_ARM_BEAGLE_GPIO_H */
\ No newline at end of file
diff --git a/c/src/lib/libbsp/arm/beagle/include/bsp.h b/c/src/lib/libbsp/arm/beagle/include/bsp.h
index e43d27a..9f11741 100644
--- a/c/src/lib/libbsp/arm/beagle/include/bsp.h
+++ b/c/src/lib/libbsp/arm/beagle/include/bsp.h
@@ -31,6 +31,7 @@
#include <stdint.h>
#include <bsp/start.h>
#include <bsp/default-initial-extension.h>
+#include <bsp/beagleboneblack.h>
#include <rtems.h>
#include <rtems/irq-extension.h>
@@ -169,6 +170,12 @@ static inline void flush_data_cache(void)
#define BEAGLE_BASE_UART_3 0x49020000
#endif
+/* GPIO pin config */
+#if IS_AM335X
+#define BSP_GPIO_PIN_COUNT 128
+#define BSP_GPIO_PINS_PER_BANK 32
+#endif
+
/* i2c stuff */
typedef struct {
uint32_t rx_or_tx;
diff --git a/c/src/lib/libbsp/arm/beagle/preinstall.am b/c/src/lib/libbsp/arm/beagle/preinstall.am
index dd1ec95..3701a2b 100644
--- a/c/src/lib/libbsp/arm/beagle/preinstall.am
+++ b/c/src/lib/libbsp/arm/beagle/preinstall.am
@@ -110,6 +110,14 @@ $(PROJECT_INCLUDE)/bsp/i2c.h: include/i2c.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/i2c.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/i2c.h
+$(PROJECT_INCLUDE)/bsp/beagleboneblack.h: include/beagleboneblack.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/beagleboneblack.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/beagleboneblack.h
+
+$(PROJECT_INCLUDE)/bsp/bbb-gpio.h: include/bbb-gpio.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bbb-gpio.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bbb-gpio.h
+
$(PROJECT_INCLUDE)/libcpu/arm-cp15.h: ../../../libcpu/arm/shared/include/arm-cp15.h $(PROJECT_INCLUDE)/libcpu/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/libcpu/arm-cp15.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/libcpu/arm-cp15.h
diff --git a/c/src/lib/libcpu/arm/shared/include/am335x.h b/c/src/lib/libcpu/arm/shared/include/am335x.h
index 37c5eeb..47126b5 100644
--- a/c/src/lib/libcpu/arm/shared/include/am335x.h
+++ b/c/src/lib/libcpu/arm/shared/include/am335x.h
@@ -300,3 +300,171 @@
#define AM335X_RTC_KICK0_KEY 0x83E70B13
#define AM335X_RTC_KICK1_KEY 0x95A4F1E0
+
+/* GPIO memory-mapped registers */
+
+#define AM335X_GPIO0_BASE 0x44E07000
+ /* GPIO Bank 0 base Register */
+#define AM335X_GPIO1_BASE 0x4804C000
+ /* GPIO Bank 1 base Register */
+#define AM335X_GPIO2_BASE 0x481AC000
+ /* GPIO Bank 2 base Register */
+#define AM335X_GPIO3_BASE 0x481AE000
+ /* GPIO Bank 3 base Register */
+
+#define AM335X_GPIO_REVISION 0x00
+#define AM335X_GPIO_SYSCONFIG 0x10
+#define AM335X_GPIO_EOI 0x20
+#define AM335X_GPIO_IRQSTATUS_RAW_0 0x24
+#define AM335X_GPIO_IRQSTATUS_RAW_1 0x28
+#define AM335X_GPIO_IRQSTATUS_0 0x2C
+#define AM335X_GPIO_IRQSTATUS_1 0x30
+#define AM335X_GPIO_IRQSTATUS_SET_0 0x34
+#define AM335X_GPIO_IRQSTATUS_SET_1 0x38
+#define AM335X_GPIO_IRQSTATUS_CLR_0 0x3C
+#define AM335X_GPIO_IRQSTATUS_CLR_0 0x40
+#define AM335X_GPIO_IRQWAKEN_0 0x44
+#define AM335X_GPIO_IRQWAKEN_1 0x48
+#define AM335X_GPIO_SYSSTATUS 0x114
+#define AM335X_GPIO_CTRL 0x130
+#define AM335X_GPIO_OE 0x134
+#define AM335X_GPIO_DATAIN 0x138
+#define AM335X_GPIO_DATAOUT 0x13C
+#define AM335X_GPIO_LEVELDETECT0 0x140
+#define AM335X_GPIO_LEVELDETECT1 0x144
+#define AM335X_GPIO_RISINGDETECT 0x148
+#define AM335X_GPIO_FALLINGDETECT 0x14C
+#define AM335X_GPIO_DEBOUNCENABLE 0x150
+#define AM335X_GPIO_DEBOUNCINGTIME 0x154
+#define AM335X_GPIO_CLEARDATAOUT 0x190
+#define AM335X_GPIO_SETDATAOUT 0x194
+
+/* AM335X Pad Configuration Register Base */
+#define AM335X_PADCONF_BASE 0x44E10000
+
+/* Memory mapped register offset for Control Module */
+#define AM335X_CONF_GPMC_AD0 0x800
+#define AM335X_CONF_GPMC_AD1 0x804
+#define AM335X_CONF_GPMC_AD2 0x808
+#define AM335X_CONF_GPMC_AD3 0x80C
+#define AM335X_CONF_GPMC_AD4 0x810
+#define AM335X_CONF_GPMC_AD5 0x814
+#define AM335X_CONF_GPMC_AD6 0x818
+#define AM335X_CONF_GPMC_AD7 0x81C
+#define AM335X_CONF_GPMC_AD8 0x820
+#define AM335X_CONF_GPMC_AD9 0x824
+#define AM335X_CONF_GPMC_AD10 0x828
+#define AM335X_CONF_GPMC_AD11 0x82C
+#define AM335X_CONF_GPMC_AD12 0x830
+#define AM335X_CONF_GPMC_AD13 0x834
+#define AM335X_CONF_GPMC_AD14 0x838
+#define AM335X_CONF_GPMC_AD15 0x83C
+#define AM335X_CONF_GPMC_A0 0x840
+#define AM335X_CONF_GPMC_A1 0x844
+#define AM335X_CONF_GPMC_A2 0x848
+#define AM335X_CONF_GPMC_A3 0x84C
+#define AM335X_CONF_GPMC_A4 0x850
+#define AM335X_CONF_GPMC_A5 0x854
+#define AM335X_CONF_GPMC_A6 0x858
+#define AM335X_CONF_GPMC_A7 0x85C
+#define AM335X_CONF_GPMC_A8 0x860
+#define AM335X_CONF_GPMC_A9 0x864
+#define AM335X_CONF_GPMC_A10 0x868
+#define AM335X_CONF_GPMC_A11 0x86C
+#define AM335X_CONF_GPMC_WAIT0 0x870
+#define AM335X_CONF_GPMC_WPN 0x874
+#define AM335X_CONF_GPMC_BEN1 0x878
+#define AM335X_CONF_GPMC_CSN0 0x87C
+#define AM335X_CONF_GPMC_CSN1 0x880
+#define AM335X_CONF_GPMC_CSN2 0x884
+#define AM335X_CONF_GPMC_CSN3 0x888
+#define AM335X_CONF_GPMC_CLK 0x88C
+#define AM335X_CONF_GPMC_ADVN_ALE 0x890
+#define AM335X_CONF_GPMC_OEN_REN 0x894
+#define AM335X_CONF_GPMC_WEN 0x898
+#define AM335X_CONF_GPMC_BEN0_CLE 0x89C
+#define AM335X_CONF_LCD_DATA0 0x8A0
+#define AM335X_CONF_LCD_DATA1 0x8A4
+#define AM335X_CONF_LCD_DATA2 0x8A8
+#define AM335X_CONF_LCD_DATA3 0x8AC
+#define AM335X_CONF_LCD_DATA4 0x8B0
+#define AM335X_CONF_LCD_DATA5 0x8B4
+#define AM335X_CONF_LCD_DATA6 0x8B8
+#define AM335X_CONF_LCD_DATA7 0x8BC
+#define AM335X_CONF_LCD_DATA8 0x8C0
+#define AM335X_CONF_LCD_DATA9 0x8C4
+#define AM335X_CONF_LCD_DATA10 0x8C8
+#define AM335X_CONF_LCD_DATA11 0x8CC
+#define AM335X_CONF_LCD_DATA12 0x8D0
+#define AM335X_CONF_LCD_DATA13 0x8D4
+#define AM335X_CONF_LCD_DATA14 0x8D8
+#define AM335X_CONF_LCD_DATA15 0x8DC
+#define AM335X_CONF_LCD_VSYNC 0x8E0
+#define AM335X_CONF_LCD_HSYNC 0x8E4
+#define AM335X_CONF_LCD_PCLK 0x8E8
+#define AM335X_CONF_LCD_AC_BIAS_EN 0x8EC
+#define AM335X_CONF_MMC0_DAT3 0x8F0
+#define AM335X_CONF_MMC0_DAT2 0x8F4
+#define AM335X_CONF_MMC0_DAT1 0x8F8
+#define AM335X_CONF_MMC0_DAT0 0x8FC
+#define AM335X_CONF_MMC0_CLK 0x900
+#define AM335X_CONF_MMC0_CMD 0x904
+#define AM335X_CONF_MII1_COL 0x908
+#define AM335X_CONF_MII1_CRS 0x90C
+#define AM335X_CONF_MII1_RX_ER 0x910
+#define AM335X_CONF_MII1_TX_EN 0x914
+#define AM335X_CONF_MII1_RX_DV 0x918
+#define AM335X_CONF_MII1_TXD3 0x91C
+#define AM335X_CONF_MII1_TXD2 0x920
+#define AM335X_CONF_MII1_TXD1 0x924
+#define AM335X_CONF_MII1_TXD0 0x928
+#define AM335X_CONF_MII1_TX_CLK 0x92C
+#define AM335X_CONF_MII1_RX_CLK 0x930
+#define AM335X_CONF_MII1_RXD3 0x934
+#define AM335X_CONF_MII1_RXD2 0x938
+#define AM335X_CONF_MII1_RXD1 0x93C
+#define AM335X_CONF_MII1_RXD0 0x940
+#define AM335X_CONF_RMII1_REF_CLK 0x944
+#define AM335X_CONF_MDIO 0x948
+#define AM335X_CONF_MDC 0x94C
+#define AM335X_CONF_SPI0_SCLK 0x950
+#define AM335X_CONF_SPI0_D0 0x954
+#define AM335X_CONF_SPI0_D1 0x958
+#define AM335X_CONF_SPI0_CS0 0x95C
+#define AM335X_CONF_SPI0_CS1 0x960
+#define AM335X_CONF_ECAP0_IN_PWM0_OUT 0x964
+#define AM335X_CONF_UART0_CTSN 0x968
+#define AM335X_CONF_UART0_RTSN 0x96C
+#define AM335X_CONF_UART0_RXD 0x970
+#define AM335X_CONF_UART0_TXD 0x974
+#define AM335X_CONF_UART1_CTSN 0x978
+#define AM335X_CONF_UART1_RTSN 0x97C
+#define AM335X_CONF_UART1_RXD 0x980
+#define AM335X_CONF_UART1_TXD 0x984
+#define AM335X_CONF_I2C0_SDA 0x988
+#define AM335X_CONF_I2C0_SCL 0x98C
+#define AM335X_CONF_MCASP0_ACLKX 0x990
+#define AM335X_CONF_MCASP0_FSX 0x994
+#define AM335X_CONF_MCASP0_AXR0 0x998
+#define AM335X_CONF_MCASP0_AHCLKR 0x99C
+#define AM335X_CONF_MCASP0_ACLKR 0x9A0
+#define AM335X_CONF_MCASP0_FSR 0x9A4
+#define AM335X_CONF_MCASP0_AXR1 0x9A8
+#define AM335X_CONF_MCASP0_AHCLKX 0x9AC
+#define AM335X_CONF_XDMA_EVENT_INTR0 0x9B0
+#define AM335X_CONF_XDMA_EVENT_INTR1 0x9B4
+#define AM335X_CONF_WARMRSTN 0x9B8
+#define AM335X_CONF_NNMI 0x9C0
+#define AM335X_CONF_TMS 0x9D0
+#define AM335X_CONF_TDI 0x9D4
+#define AM335X_CONF_TDO 0x9D8
+#define AM335X_CONF_TCK 0x9DC
+#define AM335X_CONF_TRSTN 0x9E0
+#define AM335X_CONF_EMU0 0x9E4
+#define AM335X_CONF_EMU1 0x9E8
+#define AM335X_CONF_RTC_PWRONRSTN 0x9F8
+#define AM335X_CONF_PMIC_POWER_EN 0x9FC
+#define AM335X_CONF_EXT_WAKEUP 0xA00
+#define AM335X_CONF_RTC_KALDO_ENN 0xA04
+#define AM335X_CONF_USB0_DRVVBUS 0xA1C
+#define AM335X_CONF_USB1_DRVVBUS 0xA34
\ No newline at end of file
--
1.9.1
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