ARMv7M Exception Handler
sudarshan.rajagopalan at vecna.com
Thu Aug 27 18:53:58 UTC 2015
I was working on the exception handler for the CPU hard fault. Managed
to register the fatal error user extension to RTEMS and call the user
defined function when an exception occurs. But the pointer to the
stacked frame didn't have the correct register values(esp. the PC
register). So I looked into the assembly code in
/cpukit/score/cpu/arm/armv7m-exception-default.c, where it decides which
stack pointer was used (MSP or PSP) before the exception occurred
depending on the error code returned in the Link Register. After
carefully examining all the assembly instructions, I guess theres a
little bug in the code.
The instruction "cmn r2, #3\n" in line 31 basically compares the Link
Register(lr) to value 0xFFFFFFFD (negative #3, because CMN negates the
RHS and compares with LHS) and chooses MSP or PSP in the following IT
block. This is pretty cool! But, it will not work if you have the
floating-point unit (FPU) enabled in your processor, which is enabled in
mine. With FPU enabled, the error code returned is either 0xFFFFFFE9 or
0xFFFFFFED, for which the above assembly instruction will not work out
and MSP will be selected always.
Better way to do is to check the 2nd bit of the error code to determine
which stack pointer was used before the exception happened - "tst lr,
#4\n" and change the IT block from "itt ne" to "itt eq" and the "mov"
and "add" within this IT block.
Have tested this with the above changes and it works. I have sent the
patch "0001-Fix-exception-handler-for-supporting-FPU.patch" to the devel
mailing list that fixes this problem. :)
Thanks and Regards,
More information about the devel