[PATCH] powerpc/mvme5500: Add support for Altivec and fix various warnings.

Aun-Ali Zaidi admin at kodeit.net
Sat Dec 19 22:39:28 UTC 2015


From: Kate Feng <feng at bnl.gov>

* Makefile.am: Add support for Altivec.
* startup/bspstart.c, Makefile.am: Use shared/startup/zerobss.c instead.
* irq/BSP_irq.c, pci/detect_host_bridge.c,pci.c,pcifinddevice.c:Remove warnings.

closes #1778.
---
 c/src/lib/libbsp/powerpc/mvme5500/ChangeLog        |  6 ++++
 c/src/lib/libbsp/powerpc/mvme5500/Makefile.am      |  4 ++-
 c/src/lib/libbsp/powerpc/mvme5500/bsp_specs        |  3 +-
 c/src/lib/libbsp/powerpc/mvme5500/irq/BSP_irq.c    |  3 +-
 .../powerpc/mvme5500/network/if_1GHz/if_wm.c       |  2 +-
 .../powerpc/mvme5500/pci/detect_host_bridge.c      |  2 +-
 c/src/lib/libbsp/powerpc/mvme5500/pci/pci.c        | 22 ++++++------
 .../libbsp/powerpc/mvme5500/pci/pcifinddevice.c    |  2 +-
 c/src/lib/libbsp/powerpc/mvme5500/start/start.S    | 41 +++++++++++++++++-----
 9 files changed, 58 insertions(+), 27 deletions(-)

diff --git a/c/src/lib/libbsp/powerpc/mvme5500/ChangeLog b/c/src/lib/libbsp/powerpc/mvme5500/ChangeLog
index 5405f52..dd043d4 100644
--- a/c/src/lib/libbsp/powerpc/mvme5500/ChangeLog
+++ b/c/src/lib/libbsp/powerpc/mvme5500/ChangeLog
@@ -1,3 +1,9 @@
+2011-04-10      Kate Feng <feng at bnl.gov>
+
+	* Makefile.am: Add support for Altivec.
+	* startup/bspstart.c, Makefile.am: Use shared/startup/zerobss.c instead.
+	* irq/BSP_irq.c, pci/detect_host_bridge.c,pci.c,pcifinddevice.c:Remove warnings.
+
 2011-03-31      Kate Feng <feng at bnl.gov>
 
 	PR 1778/bsps
diff --git a/c/src/lib/libbsp/powerpc/mvme5500/Makefile.am b/c/src/lib/libbsp/powerpc/mvme5500/Makefile.am
index 7af78a0..78af61e 100644
--- a/c/src/lib/libbsp/powerpc/mvme5500/Makefile.am
+++ b/c/src/lib/libbsp/powerpc/mvme5500/Makefile.am
@@ -29,6 +29,7 @@ EXTRA_DIST = startup/bootpstuff.c
 startup_SOURCES = startup/bspstart.c \
     ../../powerpc/shared/startup/pgtbl_setup.c startup/pgtbl_activate.c \
     ../../powerpc/shared/startup/pretaskinghook.c \
+    ../../powerpc/shared/startup/zerobss.c \
     ../../powerpc/shared/startup/sbrk.c ../../shared/bootcard.c \
     ../../shared/bsppredriverhook.c startup/bspclean.c \
     ../../shared/bsplibc.c ../../shared/bsppost.c \
@@ -115,7 +116,8 @@ libbsp_a_LIBADD = \
     ../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
     ../../../libcpu/@RTEMS_CPU@/@exceptions@/irq_bspsupport.rel \
     ../../../libcpu/@RTEMS_CPU@/mpc6xx/mmu.rel \
-    ../../../libcpu/@RTEMS_CPU@/mpc6xx/timer.rel
+    ../../../libcpu/@RTEMS_CPU@/mpc6xx/timer.rel \
+    ../../../libcpu/@RTEMS_CPU@/mpc6xx/altivec.rel
 if HAS_NETWORKING
 libbsp_a_LIBADD += network.rel
 endif
diff --git a/c/src/lib/libbsp/powerpc/mvme5500/bsp_specs b/c/src/lib/libbsp/powerpc/mvme5500/bsp_specs
index cd53745..8dbdcf2 100644
--- a/c/src/lib/libbsp/powerpc/mvme5500/bsp_specs
+++ b/c/src/lib/libbsp/powerpc/mvme5500/bsp_specs
@@ -4,8 +4,7 @@
 
 *startfile:
 %{!qrtems: %(old_startfile)} \
-%{!nostdlib: %{qrtems: ecrti%O%s rtems_crti%O%s crtbegin.o%s \
-  mvme5500start.o%s -e __rtems_entry_point -u __vectors}}
+%{!nostdlib: %{qrtems: ecrti%O%s rtems_crti%O%s crtbegin.o%s -e __rtems_entry_point -u __vectors mvme5500start.o%s}}
 
 *link:
 %{!qrtems: %(old_link)} %{qrtems: -dp -Bstatic}
diff --git a/c/src/lib/libbsp/powerpc/mvme5500/irq/BSP_irq.c b/c/src/lib/libbsp/powerpc/mvme5500/irq/BSP_irq.c
index 25d2a92..c767e86 100644
--- a/c/src/lib/libbsp/powerpc/mvme5500/irq/BSP_irq.c
+++ b/c/src/lib/libbsp/powerpc/mvme5500/irq/BSP_irq.c
@@ -382,7 +382,8 @@ int BSP_setup_the_pic(rtems_irq_global_settings* config)
      * bit 10:GPP interrupts as level sensitive(1) or edge sensitive(0).
      * MOTload default is set as level sensitive(1). Set it agin to make sure.
      */
-    out_le32(GT_CommUnitArb_Ctrl, (in_le32(GT_CommUnitArb_Ctrl)| (1<<10)));
+    out_le32((volatile unsigned int *)GT_CommUnitArb_Ctrl,
+	    (in_le32((volatile unsigned int *)GT_CommUnitArb_Ctrl)| (1<<10)));
 
 #if 0
     printk("BSP_irqMask_reg[0] = 0x%x, BSP_irqCause_reg[0] 0x%x\n", 
diff --git a/c/src/lib/libbsp/powerpc/mvme5500/network/if_1GHz/if_wm.c b/c/src/lib/libbsp/powerpc/mvme5500/network/if_1GHz/if_wm.c
index 1224dda..7bf96ba 100644
--- a/c/src/lib/libbsp/powerpc/mvme5500/network/if_1GHz/if_wm.c
+++ b/c/src/lib/libbsp/powerpc/mvme5500/network/if_1GHz/if_wm.c
@@ -1728,7 +1728,7 @@ static void wm_gmii_mediainit(struct wm_softc *sc)
   /* We have MII. */
   sc->sc_flags |= WM_F_HAS_MII;
 
-#if 1
+#if 0
   /* <skf> May 2009 : The value that should be programmed into IPGT is 10 */
   sc->sc_tipg = TIPG_IPGT(10)+TIPG_IPGR1(8)+TIPG_IPGR2(6); 
 #else
diff --git a/c/src/lib/libbsp/powerpc/mvme5500/pci/detect_host_bridge.c b/c/src/lib/libbsp/powerpc/mvme5500/pci/detect_host_bridge.c
index 4615464..05df501 100644
--- a/c/src/lib/libbsp/powerpc/mvme5500/pci/detect_host_bridge.c
+++ b/c/src/lib/libbsp/powerpc/mvme5500/pci/detect_host_bridge.c
@@ -27,7 +27,7 @@
 
 unsigned long _BSP_clear_hostbridge_errors(int enableMCP, int quiet)
 {
-  unsigned int pcidata, pcidata1;
+  uint32_t pcidata, pcidata1;
   int PciLocal, busNumber=0;
   
   /* On the mvme5500 board, the GT64260B system controller had the MCP
diff --git a/c/src/lib/libbsp/powerpc/mvme5500/pci/pci.c b/c/src/lib/libbsp/powerpc/mvme5500/pci/pci.c
index 0bc243c..24299a9 100644
--- a/c/src/lib/libbsp/powerpc/mvme5500/pci/pci.c
+++ b/c/src/lib/libbsp/powerpc/mvme5500/pci/pci.c
@@ -108,7 +108,7 @@ unsigned char offset,unsigned char *val)
     BSP_pci[n].config_data,pciConfigPack(bus,dev,func,offset));
 #endif
 
-  out_be32(BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
+  out_be32((volatile unsigned int *) BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
   *val = in_8(BSP_pci[n].pci_config_data + (offset&3));
   return PCIBIOS_SUCCESSFUL;
 }
@@ -129,8 +129,8 @@ unsigned char func, unsigned char offset, unsigned short *val)
   printk("addr %x, data %x, pack %x \n", config_addr,
     config_data,pciConfigPack(bus,dev,func,offset));
 #endif
-  out_be32(BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
-  *val = in_le16(BSP_pci[n].pci_config_data + (offset&2));
+  out_be32((volatile unsigned int *) BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
+  *val = in_le16((volatile unsigned short *) (BSP_pci[n].pci_config_data + (offset&2)));
   return PCIBIOS_SUCCESSFUL;
 }
 
@@ -147,8 +147,8 @@ unsigned char func, unsigned char offset, unsigned int *val)
   *val = 0xffffffff; 
   if ((offset&3)|| (offset & ~0xff)) return PCIBIOS_BAD_REGISTER_NUMBER;
 
-  out_be32(BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
-  *val = in_le32(BSP_pci[n].pci_config_data);
+  out_be32((volatile unsigned int *)BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
+  *val = in_le32((volatile unsigned int *)BSP_pci[n].pci_config_data);
   return PCIBIOS_SUCCESSFUL;
 }
 
@@ -163,8 +163,8 @@ static int indirect_pci_write_config_byte(unsigned char bus, unsigned char dev,u
 
   if (offset & ~0xff) return PCIBIOS_BAD_REGISTER_NUMBER;
 
-  out_be32(BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
-  out_8(BSP_pci[n].pci_config_data + (offset&3), val);
+  out_be32((volatile unsigned int *)BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
+  out_8((volatile unsigned char *) (BSP_pci[n].pci_config_data + (offset&3)), val);
   return PCIBIOS_SUCCESSFUL;
 }
 
@@ -179,8 +179,8 @@ static int indirect_pci_write_config_word(unsigned char bus, unsigned char dev,u
 
   if ((offset&1)|| (offset & ~0xff)) return PCIBIOS_BAD_REGISTER_NUMBER;
 
-  out_be32(BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
-  out_le16(BSP_pci[n].pci_config_data + (offset&3), val);
+  out_be32((volatile unsigned int *)BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
+  out_le16((volatile unsigned short *)(BSP_pci[n].pci_config_data + (offset&3)), val);
   return PCIBIOS_SUCCESSFUL;
 }
 
@@ -195,8 +195,8 @@ static int indirect_pci_write_config_dword(unsigned char bus,unsigned char dev,u
 
   if ((offset&3)|| (offset & ~0xff)) return PCIBIOS_BAD_REGISTER_NUMBER;
 
-  out_be32(BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
-  out_le32(BSP_pci[n].pci_config_data, val);
+  out_be32((volatile unsigned int *)BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
+  out_le32((volatile unsigned int *)BSP_pci[n].pci_config_data, val);
   return PCIBIOS_SUCCESSFUL;
 }
 
diff --git a/c/src/lib/libbsp/powerpc/mvme5500/pci/pcifinddevice.c b/c/src/lib/libbsp/powerpc/mvme5500/pci/pcifinddevice.c
index c3b677d..44723d0 100644
--- a/c/src/lib/libbsp/powerpc/mvme5500/pci/pcifinddevice.c
+++ b/c/src/lib/libbsp/powerpc/mvme5500/pci/pcifinddevice.c
@@ -35,7 +35,7 @@ int BSP_pciFindDevicePrint(unsigned short vendorid, unsigned short deviceid,
 int pci_find_device( unsigned short vendorid, unsigned short deviceid,
                    int instance, int *pbus, int *pdev, int *pfun )
 {
-  unsigned int d;
+  uint32_t d;
   unsigned short s;
   unsigned char bus,dev,fun,hd;
 
diff --git a/c/src/lib/libbsp/powerpc/mvme5500/start/start.S b/c/src/lib/libbsp/powerpc/mvme5500/start/start.S
index a54836e..436600a 100644
--- a/c/src/lib/libbsp/powerpc/mvme5500/start/start.S
+++ b/c/src/lib/libbsp/powerpc/mvme5500/start/start.S
@@ -4,7 +4,7 @@
  *  Copyright (C) 1999 Eric Valette. valette at crf.canon.fr
  *
  *  S. Kate Feng <feng1 at bnl.gov>, April 2004
- *  Mapped the 2nd 256MB of RAM to support the MVME5500 boards.
+ *  Mapped the 2nd 256MB of RAM to support the MVME5500/MVME6100 boards.
  *
  *  The license and distribution terms for this file may be
  *  found in the file LICENSE in this distribution or at
@@ -16,8 +16,10 @@
 #include <rtems/asm.h>
 #include <rtems/score/cpu.h>
 #include <rtems/powerpc/powerpc.h>
+
 #include <libcpu/io.h>
 #include <libcpu/bat.h>
+#include <bspopts.h>
 
 #define SYNC \
 	sync; \
@@ -33,7 +35,6 @@
 	li	r10,0x63	;	\
 	sc
 
-		
 	.text
 	.globl	__rtems_entry_point
 	.type	__rtems_entry_point, at function
@@ -62,6 +63,21 @@ __rtems_entry_point:
 	mr	r29,r5
 	mr	r28,r6
 	mr	r27,r7
+
+#ifdef __ALTIVEC__
+	/* enable altivec; gcc may use it! */
+	mfmsr r0
+	oris  r0, r0, (1<<(32-16-6))
+	mtmsr r0
+	/*
+	 * set vscr and vrsave to known values
+	 */
+	li    r0, 0
+	mtvrsave r0
+	vxor   0,0,0
+	mtvscr 0
+#endif
+
 	/*
 	 * Make sure we have nothing in BATS and TLB
 	 */
@@ -72,7 +88,8 @@ __rtems_entry_point:
  * of RAM to KERNELBASE. 
  */
 	lis	r11,KERNELBASE at h
-	ori	r11,r11,0x1ffe		/* set up BAT0 registers for 604+ */
+/* set up BAT registers for 604 */
+	ori	r11,r11,0x1ffe
 	li	r8,2			/* R/W access */
 	isync
 	mtspr	DBAT0L,r8		/* N.B. 6xx (not 601) have valid */
@@ -81,8 +98,8 @@ __rtems_entry_point:
 	mtspr	IBAT0U,r11
 	isync
 /*
- * Use the 2nd pair of BAT registers to map the 2nd 256MB
- * of RAM to 0x10000000. <SKF>
+ * <skf> Use the 2nd pair of BAT registers to map the 2nd 256MB
+ * of RAM to 0x10000000.
  */
 	lis	r11,MEM256MB at h
 	ori	r11,r11,0x1ffe		/* set up BAT1 registers for 604+ */
@@ -106,7 +123,7 @@ __rtems_entry_point:
 	
 enter_C_code:
 	bl	MMUon
-	bl  __eabi	/* setup EABI and SYSV environment */
+	bl	__eabi	/* setup EABI and SYSV environment */
 	bl	zero_bss
 	/*
 	 * restore prep boot params
@@ -122,9 +139,16 @@ enter_C_code:
 	 */
 	addis	r9,r0, __rtems_end+(4096-PPC_MINIMUM_STACK_FRAME_SIZE)@ha
         addi	r9,r9, __rtems_end+(4096-PPC_MINIMUM_STACK_FRAME_SIZE)@l
-	mr	r1, r9
 	/*
-	 * We are know in a environment that is totally independent from bootloader setup.
+	 * align initial stack
+	 * (we hope that the bootloader stack was 16-byte aligned)
+	 * or we haven't used altivec yet...)
+	 */
+	li   r0, (CPU_STACK_ALIGNMENT-1)
+	andc r1, r9, r0
+	/*
+	 * We are now in an environment that is totally independent from
+	 * bootloader setup.
 	 */
         lis	r5,environ at ha
         la	r5,environ at l(r5)	/* environp */
@@ -165,7 +189,6 @@ MMUoff:
 	.globl	_return_to_ppcbug
 	.type	_return_to_ppcbug, at function
 
-	
 _return_to_ppcbug:
 	mflr	r30
 	bl	MMUoff
-- 
2.1.4




More information about the devel mailing list