[PATCH 1/3] Move libcsupport/include/motorola/*.h to m68k/idp BSP
Joel Sherrill
joel.sherrill at oarcorp.com
Mon Mar 9 21:08:44 UTC 2015
These header files were only used by one BSP and they are
hardware dependent. The hardware dependency always made
them bad candidates for where they were in the tree. But
this fixes that.
---
c/src/lib/libbsp/m68k/idp/Makefile.am | 5 +
.../lib/libbsp/m68k/idp/include/motorola/mc68230.h | 72 +++++
.../lib/libbsp/m68k/idp/include/motorola/mc68681.h | 307 +++++++++++++++++++++
c/src/lib/libbsp/m68k/idp/preinstall.am | 13 +
cpukit/libcsupport/include/motorola/mc68230.h | 72 -----
cpukit/libcsupport/include/motorola/mc68681.h | 307 ---------------------
cpukit/libcsupport/preinstall.am | 13 -
7 files changed, 397 insertions(+), 392 deletions(-)
create mode 100644 c/src/lib/libbsp/m68k/idp/include/motorola/mc68230.h
create mode 100644 c/src/lib/libbsp/m68k/idp/include/motorola/mc68681.h
delete mode 100644 cpukit/libcsupport/include/motorola/mc68230.h
delete mode 100644 cpukit/libcsupport/include/motorola/mc68681.h
diff --git a/c/src/lib/libbsp/m68k/idp/Makefile.am b/c/src/lib/libbsp/m68k/idp/Makefile.am
index 35f873e..7dcba6d 100644
--- a/c/src/lib/libbsp/m68k/idp/Makefile.am
+++ b/c/src/lib/libbsp/m68k/idp/Makefile.am
@@ -16,6 +16,11 @@ DISTCLEANFILES = include/bspopts.h
include_HEADERS += include/leds.h
nodist_include_HEADERS += ../../shared/include/coverhd.h
+## Motorola device support files
+include_rtems_motoroladir = $(includedir)/rtems/motorola
+include_rtems_motorola_HEADERS = include/motorola/mc68230.h
+include_rtems_motorola_HEADERS += include/motorola/mc68681.h
+
noinst_LIBRARIES = libbspstart.a
libbspstart_a_SOURCES = ../../m68k/shared/start/start.S
project_lib_DATA = start.$(OBJEXT)
diff --git a/c/src/lib/libbsp/m68k/idp/include/motorola/mc68230.h b/c/src/lib/libbsp/m68k/idp/include/motorola/mc68230.h
new file mode 100644
index 0000000..2f94e00
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/idp/include/motorola/mc68230.h
@@ -0,0 +1,72 @@
+/**
+ * @file rtems/motorola/mc68230.h
+ *
+ * Low level support code for the Motorola 68230 Parallel
+ * Interface/Timer (PIT)
+ */
+
+/*
+ * Modified by Doug McBride, Colorado Space Grant College
+ *
+ * Format taken partly from RTEMS code and mostly from Motorola IDP user's
+ * manual. RTEMS copyright information below.
+ *
+ * COPYRIGHT (c) 1989-2011.
+ * On-Line Applications Research Corporation (OAR).
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef _RTEMS_MOTOROLA_MC68230_H
+#define _RTEMS_MOTOROLA_MC68230_H
+
+/* Some Motorola IDP User manual defines: */
+#define MC68230_PIT_ADDR 0x00c01003 /* base address of the PIT */
+#define MC68230_REGOFF 0x04 /* Difference between addresses */
+#define MC68230_VECT 64
+#define MC68230_H1VECT 0x00
+#define MC68230_H2VECT 0x01
+#define MC68230_H3VECT 0x02
+#define MC68230_H4VECT 0x03
+
+/*
+ * mc68230 register offsets
+ */
+#define MC68230_PGCR 0x00
+#define MC68230_PSRR 1*MC68230_REGOFF
+#define MC68230_PADDR 2*MC68230_REGOFF
+#define MC68230_PBDDR 3*MC68230_REGOFF
+#define MC68230_PCDDR 4*MC68230_REGOFF
+#define MC68230_PIVR 5*MC68230_REGOFF
+#define MC68230_PACR 6*MC68230_REGOFF
+#define MC68230_PBCR 7*MC68230_REGOFF
+#define MC68230_PADR 8*MC68230_REGOFF
+#define MC68230_PBDR 9*MC68230_REGOFF
+#define MC68230_PAAR 10*MC68230_REGOFF
+#define MC68230_PBAR 11*MC68230_REGOFF
+#define MC68230_PCDR 12*MC68230_REGOFF
+#define MC68230_PITSR 13*MC68230_REGOFF
+#define MC68230_TCR 16*MC68230_REGOFF
+#define MC68230_TIVR 17*MC68230_REGOFF
+#define MC68230_CPRH 19*MC68230_REGOFF
+#define MC68230_CPRM 20*MC68230_REGOFF
+#define MC68230_CPRL 21*MC68230_REGOFF
+#define MC68230_CNTRH 23*MC68230_REGOFF
+#define MC68230_CNTRM 24*MC68230_REGOFF
+#define MC68230_CNTRL 25*MC68230_REGOFF
+#define MC68230_TSR 26*MC68230_REGOFF
+
+/* Some RTEMS style defines: */
+#ifndef MC68230_VOL8
+#define MC68230_VOL8( ptr ) ((volatile uint8_t *)(ptr))
+#endif
+
+#define MC68230_WRITE( reg, data ) \
+ *(MC68230_VOL8(MC68230_PIT_ADDR+reg)) = (data)
+
+#define MC68230_READ( reg, data ) \
+ (data) = *(MC68230_VOL8(MC68230_PIT_ADDR+reg))
+
+#endif
diff --git a/c/src/lib/libbsp/m68k/idp/include/motorola/mc68681.h b/c/src/lib/libbsp/m68k/idp/include/motorola/mc68681.h
new file mode 100644
index 0000000..83a7d1f
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/idp/include/motorola/mc68681.h
@@ -0,0 +1,307 @@
+/**
+ * @file rtems/motorola/mc68681.h
+ *
+ *
+ * mc68681-duart.h -- Low level support code for the Motorola mc68681
+ * DUART.
+ */
+
+/*
+ *
+ * Originally written by rob at cygnus.com (Rob Savoye) for the libgloss
+ * IDP support.
+ */
+
+#ifndef _RTEMS_MOTOROLA_MC68681_H
+#define _RTEMS_MOTOROLA_MC68681_H
+
+/*
+ * In the dark ages when this controller was designed, it was actually
+ * possible to access data on unaligned byte boundaries with no penalty.
+ * Now we find this chip in configurations in which the registers are
+ * at 16-bit, 32-bit, and 64-bit boundaries at the whim of the board
+ * designer. If the registers are not at byte addresses, then
+ * set this multiplier before including this file to correct the offsets.
+ */
+
+#ifndef MC68681_OFFSET_MULTIPLIER
+#define MC68681_OFFSET_MULTIPLIER 1
+#endif
+
+#define __MC68681_REG(_R) ((_R) * MC68681_OFFSET_MULTIPLIER)
+
+/*
+ * mc68681 register offsets Read/Write Addresses
+ */
+#define MC68681_MODE_REG_1A __MC68681_REG(0) /* MR1A-MR Prior to Read */
+#define MC68681_MODE_REG_2A __MC68681_REG(0) /* MR2A-MR After Read */
+
+#define MC68681_COUNT_MODE_CURRENT_MSB __MC68681_REG(6) /* CTU */
+#define MC68681_COUNTER_TIMER_UPPER_REG __MC68681_REG(6) /* CTU */
+#define MC68681_COUNT_MODE_CURRENT_LSB __MC68681_REG(7) /* CTL */
+#define MC68681_COUNTER_TIMER_LOWER_REG __MC68681_REG(7) /* CTL */
+#define MC68681_INTERRUPT_VECTOR_REG __MC68681_REG(12) /* IVR */
+
+#define MC68681_MODE_REG_1B __MC68681_REG(8) /* MR1B-MR Prior to Read */
+#define MC68681_MODE_REG_2B __MC68681_REG(8) /* MR2BA-MR After Read */
+
+/*
+ * mc68681 register offsets Read Only Addresses
+ */
+#define MC68681_STATUS_REG_A __MC68681_REG(1) /* SRA */
+#define MC68681_MASK_ISR_REG __MC68681_REG(2) /* MISR */
+#define MC68681_RECEIVE_BUFFER_A __MC68681_REG(3) /* RHRA */
+#define MC68681_INPUT_PORT_CHANGE_REG __MC68681_REG(4) /* IPCR */
+#define MC68681_INTERRUPT_STATUS_REG __MC68681_REG(5) /* ISR */
+#define MC68681_STATUS_REG_B __MC68681_REG(9) /* SRB */
+#define MC68681_RECEIVE_BUFFER_B __MC68681_REG(11) /* RHRB */
+#define MC68681_INPUT_PORT __MC68681_REG(13) /* IP */
+#define MC68681_START_COUNT_CMD __MC68681_REG(14) /* SCC */
+#define MC68681_STOP_COUNT_CMD __MC68681_REG(15) /* STC */
+
+/*
+ * mc68681 register offsets Write Only Addresses
+ */
+#define MC68681_CLOCK_SELECT_REG_A __MC68681_REG(1) /* CSRA */
+#define MC68681_COMMAND_REG_A __MC68681_REG(2) /* CRA */
+#define MC68681_TRANSMIT_BUFFER_A __MC68681_REG(3) /* THRA */
+#define MC68681_AUX_CTRL_REG __MC68681_REG(4) /* ACR */
+#define MC68681_INTERRUPT_MASK_REG __MC68681_REG(5) /* IMR */
+#define MC68681_CLOCK_SELECT_REG_B __MC68681_REG(9) /* CSRB */
+#define MC68681_COMMAND_REG_B __MC68681_REG(10) /* CRB */
+#define MC68681_TRANSMIT_BUFFER_B __MC68681_REG(11) /* THRB */
+#define MC68681_OUTPUT_PORT_CONFIG_REG __MC68681_REG(13) /* OPCR */
+#define MC68681_OUTPUT_PORT_SET_REG __MC68681_REG(14) /* SOPBC */
+#define MC68681_OUTPUT_PORT_RESET_BITS __MC68681_REG(15) /* COPBC */
+
+
+#ifndef MC6681_VOL
+#define MC6681_VOL( ptr ) ((volatile unsigned char *)(ptr))
+#endif
+
+#define MC68681_WRITE( _base, _reg, _data ) \
+ *((volatile unsigned char *)_base+_reg) = (_data)
+
+#define MC68681_READ( _base, _reg ) \
+ *(((volatile unsigned char *)_base+_reg))
+
+
+
+#define MC68681_CLEAR 0x00
+
+#define MC68681_PORT_A 0
+#define MC68681_PORT_B 1
+
+/*
+ * DUART Command Register Definitions:
+ *
+ * MC68681_COMMAND_REG_A,MC68681_COMMAND_REG_B
+ */
+#define MC68681_MODE_REG_ENABLE_RX 0x01
+#define MC68681_MODE_REG_DISABLE_RX 0x02
+#define MC68681_MODE_REG_ENABLE_TX 0x04
+#define MC68681_MODE_REG_DISABLE_TX 0x08
+#define MC68681_MODE_REG_RESET_MR_PTR 0x10
+#define MC68681_MODE_REG_RESET_RX 0x20
+#define MC68681_MODE_REG_RESET_TX 0x30
+#define MC68681_MODE_REG_RESET_ERROR 0x40
+#define MC68681_MODE_REG_RESET_BREAK 0x50
+#define MC68681_MODE_REG_START_BREAK 0x60
+#define MC68681_MODE_REG_STOP_BREAK 0x70
+#define MC68681_MODE_REG_SET_RX_BRG 0x80
+#define MC68681_MODE_REG_CLEAR_RX_BRG 0x90
+#define MC68681_MODE_REG_SET_TX_BRG 0xa0
+#define MC68681_MODE_REG_CLEAR_TX_BRG 0xb0
+#define MC68681_MODE_REG_SET_STANDBY 0xc0
+#define MC68681_MODE_REG_SET_ACTIVE 0xd0
+
+/*
+ * Mode Register Definitions
+ *
+ * MC68681_MODE_REG_1A
+ * MC68681_MODE_REG_1B
+ */
+#define MC68681_5BIT_CHARS 0x00
+#define MC68681_6BIT_CHARS 0x01
+#define MC68681_7BIT_CHARS 0x02
+#define MC68681_8BIT_CHARS 0x03
+
+#define MC68681_ODD_PARITY 0x00
+#define MC68681_EVEN_PARITY 0x04
+
+#define MC68681_WITH_PARITY 0x00
+#define MC68681_FORCE_PARITY 0x08
+#define MC68681_NO_PARITY 0x10
+#define MC68681_MULTI_DROP 0x18
+
+#define MC68681_ERR_MODE_CHAR 0x00
+#define MC68681_ERR_MODE_BLOCK 0x20
+
+#define MC68681_RX_INTR_RX_READY 0x00
+#define MC68681_RX_INTR_FFULL 0x40
+
+#define MC68681_NO_RX_RTS_CTL 0x00
+#define MC68681_RX_RTS_CTRL 0x80
+
+
+/*
+ * Mode Register Definitions
+ *
+ * MC68681_MODE_REG_2A
+ * MC68681_MODE_REG_2B
+ */
+#define MC68681_STOP_BIT_LENGTH__563 0x00
+#define MC68681_STOP_BIT_LENGTH__625 0x01
+#define MC68681_STOP_BIT_LENGTH__688 0x02
+#define MC68681_STOP_BIT_LENGTH__75 0x03
+#define MC68681_STOP_BIT_LENGTH__813 0x04
+#define MC68681_STOP_BIT_LENGTH__875 0x05
+#define MC68681_STOP_BIT_LENGTH__938 0x06
+#define MC68681_STOP_BIT_LENGTH_1 0x07
+#define MC68681_STOP_BIT_LENGTH_1_563 0x08
+#define MC68681_STOP_BIT_LENGTH_1_625 0x09
+#define MC68681_STOP_BIT_LENGTH_1_688 0x0a
+#define MC68681_STOP_BIT_LENGTH_1_75 0x0b
+#define MC68681_STOP_BIT_LENGTH_1_813 0x0c
+#define MC68681_STOP_BIT_LENGTH_1_875 0x0d
+#define MC68681_STOP_BIT_LENGTH_1_938 0x0e
+#define MC68681_STOP_BIT_LENGTH_2 0x0f
+
+#define MC68681_CTS_ENABLE_TX 0x10
+#define MC68681_TX_RTS_CTRL 0x20
+
+#define MC68681_CHANNEL_MODE_NORMAL 0x00
+#define MC68681_CHANNEL_MODE_ECHO 0x40
+#define MC68681_CHANNEL_MODE_LOCAL_LOOP 0x80
+#define MC68681_CHANNEL_MODE_REMOTE_LOOP 0xc0
+
+/*
+ * Status Register Definitions
+ *
+ * MC68681_STATUS_REG_A, MC68681_STATUS_REG_B
+ */
+#define MC68681_RX_READY 0x01
+#define MC68681_FFULL 0x02
+#define MC68681_TX_READY 0x04
+#define MC68681_TX_EMPTY 0x08
+#define MC68681_OVERRUN_ERROR 0x10
+#define MC68681_PARITY_ERROR 0x20
+#define MC68681_FRAMING_ERROR 0x40
+#define MC68681_RECEIVED_BREAK 0x80
+
+
+/*
+ * Interupt Status Register Definitions.
+ *
+ * MC68681_INTERRUPT_STATUS_REG
+ */
+
+
+/*
+ * Interupt Mask Register Definitions
+ *
+ * MC68681_INTERRUPT_MASK_REG
+ */
+#define MC68681_IR_TX_READY_A 0x01
+#define MC68681_IR_RX_READY_A 0x02
+#define MC68681_IR_BREAK_A 0x04
+#define MC68681_IR_COUNTER_READY 0x08
+#define MC68681_IR_TX_READY_B 0x10
+#define MC68681_IR_RX_READY_B 0x20
+#define MC68681_IR_BREAK_B 0x40
+#define MC68681_IR_INPUT_PORT_CHANGE 0x80
+
+/*
+ * Status Register Definitions.
+ *
+ * MC68681_STATUS_REG_A,MC68681_STATUS_REG_B
+ */
+#define MC68681_STATUS_RXRDY 0x01
+#define MC68681_STATUS_FFULL 0x02
+#define MC68681_STATUS_TXRDY 0x04
+#define MC68681_STATUS_TXEMT 0x08
+#define MC68681_STATUS_OVERRUN_ERROR 0x10
+#define MC68681_STATUS_PARITY_ERROR 0x20
+#define MC68681_STATUS_FRAMING_ERROR 0x40
+#define MC68681_STATUS_RECEIVED_BREAK 0x80
+
+/*
+ * Definitions for the Interrupt Vector Register:
+ *
+ * MC68681_INTERRUPT_VECTOR_REG
+ */
+#define MC68681_INTERRUPT_VECTOR_INIT 0x0f
+
+/*
+ * Definitions for the Auxiliary Control Register
+ *
+ * MC68681_AUX_CTRL_REG
+ */
+#define MC68681_AUX_BRG_SET1 0x00
+#define MC68681_AUX_BRG_SET2 0x80
+
+
+/*
+ * The following Baud rates assume the X1 clock pin is driven with a
+ * 3.6864 MHz signal. If a different frequency is used the DUART channel
+ * is running at the follwoing baud rate:
+ * ((Table Baud Rate)*frequency)/3.6864 MHz
+ */
+
+/*
+ * Definitions for the Clock Select Register:
+ *
+ * MC68681_CLOCK_SELECT_REG_A,MC68681_CLOCK_SELECT_REG_A
+ *
+ * Note: ACR[7] is the MSB of the Auxiliary Control register
+ * X is the extend bit.
+ * CRA - 0x08 Set Rx BRG Select Extend Bit (X=1)
+ * CRA - 0x09 Clear Rx BRG Select Extend Bit (X=0)
+ * CRB - 0x0a Set Tx BRG Select Extend Bit (X=1)
+ * CRB - 0x0b Clear Tx BRG Select Extend Bit (x=1)
+ */
+#define MC68681_BAUD_RATE_MASK_50 0x00 /* ACR[7]=0,X=0 */
+ /* ARC[7]=1,X=1 */
+#define MC68681_BAUD_RATE_MASK_75 0x00 /* ACR[7]=0,X=0 */
+ /* ARC[7]=1,X=1 */
+#define MC68681_BAUD_RATE_MASK_110 0x01
+#define MC68681_BAUD_RATE_MASK_134_5 0x02
+#define MC68681_BAUD_RATE_MASK_150 0x03 /* ACR[7]=0,X=0 */
+ /* ARC[7]=1,X=1 */
+#define MC68681_BAUD_RATE_MASK_200 0x03 /* ACR[7]=0,X=0 */
+ /* ARC[7]=1,X=1 */
+#define MC68681_BAUD_RATE_MASK_300 0x04 /* ACR[7]=0,X=0 */
+ /* ARC[7]=1,X=1 */
+#define MC68681_BAUD_RATE_MASK_600 0x05 /* ACR[7]=0,X=0 */
+ /* ARC[7]=1,X=1 */
+#define MC68681_BAUD_RATE_MASK_1050 0x07 /* ACR[7]=0,X=0 */
+ /* ARC[7]=1,X=1 */
+#define MC68681_BAUD_RATE_MASK_1200 0x06 /* ACR[7]=0,X=0 */
+ /* ARC[7]=1,X=1 */
+#define MC68681_BAUD_RATE_MASK_1800 0x0a /* ACR[7]=0,X=0 */
+ /* ARC[7]=1,X=1 */
+#define MC68681_BAUD_RATE_MASK_2400 0x08 /* ACR[7]=0,X=0 */
+ /* ARC[7]=1,X=1 */
+#define MC68681_BAUD_RATE_MASK_3600 0x04 /* ACR[7]=0,X=0 */
+ /* ARC[7]=1,X=1 */
+#define MC68681_BAUD_RATE_MASK_4800 0x09
+#define MC68681_BAUD_RATE_MASK_7200 0x0a /* ACR[7]=0,X=0 */
+ /* ARC[7]=1,X=1 */
+#define MC68681_BAUD_RATE_MASK_9600 0xbb
+
+#define MC68681_BAUD_RATE_MASK_14_4K 0x05 /* ACR[7]=0,X=0 */
+ /* ARC[7]=1,X=1 */
+#define MC68681_BAUD_RATE_MASK_19_2K 0xcc /* ACR[7]=1,X=0 */
+ /* ARC[7]=0,X=1 */
+#define MC68681_BAUD_RATE_MASK_28_8K 0x06 /* ACR[7]=0,X=0 */
+ /* ARC[7]=1,X=1 */
+#define MC68681_BAUD_RATE_MASK_38_4K 0xcc /* ACR[7]=0,X=0 */
+ /* ARC[7]=1,X=1 */
+#define MC68681_BAUD_RATE_MASK_57_6K 0x07 /* ACR[7]=0,X=0 */
+ /* ARC[7]=1,X=1 */
+#define MC68681_BAUD_RATE_MASK_115_5K 0x08
+#define MC68681_BAUD_RATE_MASK_TIMER 0xdd
+#define MC68681_BAUD_RATE_MASK_TIMER_16X 0xee
+#define MC68681_BAUD_RATE_MASK_TIMER_1X 0xff
+
+#endif
diff --git a/c/src/lib/libbsp/m68k/idp/preinstall.am b/c/src/lib/libbsp/m68k/idp/preinstall.am
index 0a548ff..fd9907b 100644
--- a/c/src/lib/libbsp/m68k/idp/preinstall.am
+++ b/c/src/lib/libbsp/m68k/idp/preinstall.am
@@ -61,6 +61,19 @@ $(PROJECT_INCLUDE)/coverhd.h: ../../shared/include/coverhd.h $(PROJECT_INCLUDE)/
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/coverhd.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/coverhd.h
+$(PROJECT_INCLUDE)/rtems/motorola/$(dirstamp):
+ @$(MKDIR_P) $(PROJECT_INCLUDE)/rtems/motorola
+ @: > $(PROJECT_INCLUDE)/rtems/motorola/$(dirstamp)
+PREINSTALL_DIRS += $(PROJECT_INCLUDE)/rtems/motorola/$(dirstamp)
+
+$(PROJECT_INCLUDE)/rtems/motorola/mc68230.h: include/motorola/mc68230.h $(PROJECT_INCLUDE)/rtems/motorola/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/rtems/motorola/mc68230.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/rtems/motorola/mc68230.h
+
+$(PROJECT_INCLUDE)/rtems/motorola/mc68681.h: include/motorola/mc68681.h $(PROJECT_INCLUDE)/rtems/motorola/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/rtems/motorola/mc68681.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/rtems/motorola/mc68681.h
+
$(PROJECT_LIB)/start.$(OBJEXT): start.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/start.$(OBJEXT)
TMPINSTALL_FILES += $(PROJECT_LIB)/start.$(OBJEXT)
diff --git a/cpukit/libcsupport/include/motorola/mc68230.h b/cpukit/libcsupport/include/motorola/mc68230.h
deleted file mode 100644
index 2f94e00..0000000
--- a/cpukit/libcsupport/include/motorola/mc68230.h
+++ /dev/null
@@ -1,72 +0,0 @@
-/**
- * @file rtems/motorola/mc68230.h
- *
- * Low level support code for the Motorola 68230 Parallel
- * Interface/Timer (PIT)
- */
-
-/*
- * Modified by Doug McBride, Colorado Space Grant College
- *
- * Format taken partly from RTEMS code and mostly from Motorola IDP user's
- * manual. RTEMS copyright information below.
- *
- * COPYRIGHT (c) 1989-2011.
- * On-Line Applications Research Corporation (OAR).
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#ifndef _RTEMS_MOTOROLA_MC68230_H
-#define _RTEMS_MOTOROLA_MC68230_H
-
-/* Some Motorola IDP User manual defines: */
-#define MC68230_PIT_ADDR 0x00c01003 /* base address of the PIT */
-#define MC68230_REGOFF 0x04 /* Difference between addresses */
-#define MC68230_VECT 64
-#define MC68230_H1VECT 0x00
-#define MC68230_H2VECT 0x01
-#define MC68230_H3VECT 0x02
-#define MC68230_H4VECT 0x03
-
-/*
- * mc68230 register offsets
- */
-#define MC68230_PGCR 0x00
-#define MC68230_PSRR 1*MC68230_REGOFF
-#define MC68230_PADDR 2*MC68230_REGOFF
-#define MC68230_PBDDR 3*MC68230_REGOFF
-#define MC68230_PCDDR 4*MC68230_REGOFF
-#define MC68230_PIVR 5*MC68230_REGOFF
-#define MC68230_PACR 6*MC68230_REGOFF
-#define MC68230_PBCR 7*MC68230_REGOFF
-#define MC68230_PADR 8*MC68230_REGOFF
-#define MC68230_PBDR 9*MC68230_REGOFF
-#define MC68230_PAAR 10*MC68230_REGOFF
-#define MC68230_PBAR 11*MC68230_REGOFF
-#define MC68230_PCDR 12*MC68230_REGOFF
-#define MC68230_PITSR 13*MC68230_REGOFF
-#define MC68230_TCR 16*MC68230_REGOFF
-#define MC68230_TIVR 17*MC68230_REGOFF
-#define MC68230_CPRH 19*MC68230_REGOFF
-#define MC68230_CPRM 20*MC68230_REGOFF
-#define MC68230_CPRL 21*MC68230_REGOFF
-#define MC68230_CNTRH 23*MC68230_REGOFF
-#define MC68230_CNTRM 24*MC68230_REGOFF
-#define MC68230_CNTRL 25*MC68230_REGOFF
-#define MC68230_TSR 26*MC68230_REGOFF
-
-/* Some RTEMS style defines: */
-#ifndef MC68230_VOL8
-#define MC68230_VOL8( ptr ) ((volatile uint8_t *)(ptr))
-#endif
-
-#define MC68230_WRITE( reg, data ) \
- *(MC68230_VOL8(MC68230_PIT_ADDR+reg)) = (data)
-
-#define MC68230_READ( reg, data ) \
- (data) = *(MC68230_VOL8(MC68230_PIT_ADDR+reg))
-
-#endif
diff --git a/cpukit/libcsupport/include/motorola/mc68681.h b/cpukit/libcsupport/include/motorola/mc68681.h
deleted file mode 100644
index 83a7d1f..0000000
--- a/cpukit/libcsupport/include/motorola/mc68681.h
+++ /dev/null
@@ -1,307 +0,0 @@
-/**
- * @file rtems/motorola/mc68681.h
- *
- *
- * mc68681-duart.h -- Low level support code for the Motorola mc68681
- * DUART.
- */
-
-/*
- *
- * Originally written by rob at cygnus.com (Rob Savoye) for the libgloss
- * IDP support.
- */
-
-#ifndef _RTEMS_MOTOROLA_MC68681_H
-#define _RTEMS_MOTOROLA_MC68681_H
-
-/*
- * In the dark ages when this controller was designed, it was actually
- * possible to access data on unaligned byte boundaries with no penalty.
- * Now we find this chip in configurations in which the registers are
- * at 16-bit, 32-bit, and 64-bit boundaries at the whim of the board
- * designer. If the registers are not at byte addresses, then
- * set this multiplier before including this file to correct the offsets.
- */
-
-#ifndef MC68681_OFFSET_MULTIPLIER
-#define MC68681_OFFSET_MULTIPLIER 1
-#endif
-
-#define __MC68681_REG(_R) ((_R) * MC68681_OFFSET_MULTIPLIER)
-
-/*
- * mc68681 register offsets Read/Write Addresses
- */
-#define MC68681_MODE_REG_1A __MC68681_REG(0) /* MR1A-MR Prior to Read */
-#define MC68681_MODE_REG_2A __MC68681_REG(0) /* MR2A-MR After Read */
-
-#define MC68681_COUNT_MODE_CURRENT_MSB __MC68681_REG(6) /* CTU */
-#define MC68681_COUNTER_TIMER_UPPER_REG __MC68681_REG(6) /* CTU */
-#define MC68681_COUNT_MODE_CURRENT_LSB __MC68681_REG(7) /* CTL */
-#define MC68681_COUNTER_TIMER_LOWER_REG __MC68681_REG(7) /* CTL */
-#define MC68681_INTERRUPT_VECTOR_REG __MC68681_REG(12) /* IVR */
-
-#define MC68681_MODE_REG_1B __MC68681_REG(8) /* MR1B-MR Prior to Read */
-#define MC68681_MODE_REG_2B __MC68681_REG(8) /* MR2BA-MR After Read */
-
-/*
- * mc68681 register offsets Read Only Addresses
- */
-#define MC68681_STATUS_REG_A __MC68681_REG(1) /* SRA */
-#define MC68681_MASK_ISR_REG __MC68681_REG(2) /* MISR */
-#define MC68681_RECEIVE_BUFFER_A __MC68681_REG(3) /* RHRA */
-#define MC68681_INPUT_PORT_CHANGE_REG __MC68681_REG(4) /* IPCR */
-#define MC68681_INTERRUPT_STATUS_REG __MC68681_REG(5) /* ISR */
-#define MC68681_STATUS_REG_B __MC68681_REG(9) /* SRB */
-#define MC68681_RECEIVE_BUFFER_B __MC68681_REG(11) /* RHRB */
-#define MC68681_INPUT_PORT __MC68681_REG(13) /* IP */
-#define MC68681_START_COUNT_CMD __MC68681_REG(14) /* SCC */
-#define MC68681_STOP_COUNT_CMD __MC68681_REG(15) /* STC */
-
-/*
- * mc68681 register offsets Write Only Addresses
- */
-#define MC68681_CLOCK_SELECT_REG_A __MC68681_REG(1) /* CSRA */
-#define MC68681_COMMAND_REG_A __MC68681_REG(2) /* CRA */
-#define MC68681_TRANSMIT_BUFFER_A __MC68681_REG(3) /* THRA */
-#define MC68681_AUX_CTRL_REG __MC68681_REG(4) /* ACR */
-#define MC68681_INTERRUPT_MASK_REG __MC68681_REG(5) /* IMR */
-#define MC68681_CLOCK_SELECT_REG_B __MC68681_REG(9) /* CSRB */
-#define MC68681_COMMAND_REG_B __MC68681_REG(10) /* CRB */
-#define MC68681_TRANSMIT_BUFFER_B __MC68681_REG(11) /* THRB */
-#define MC68681_OUTPUT_PORT_CONFIG_REG __MC68681_REG(13) /* OPCR */
-#define MC68681_OUTPUT_PORT_SET_REG __MC68681_REG(14) /* SOPBC */
-#define MC68681_OUTPUT_PORT_RESET_BITS __MC68681_REG(15) /* COPBC */
-
-
-#ifndef MC6681_VOL
-#define MC6681_VOL( ptr ) ((volatile unsigned char *)(ptr))
-#endif
-
-#define MC68681_WRITE( _base, _reg, _data ) \
- *((volatile unsigned char *)_base+_reg) = (_data)
-
-#define MC68681_READ( _base, _reg ) \
- *(((volatile unsigned char *)_base+_reg))
-
-
-
-#define MC68681_CLEAR 0x00
-
-#define MC68681_PORT_A 0
-#define MC68681_PORT_B 1
-
-/*
- * DUART Command Register Definitions:
- *
- * MC68681_COMMAND_REG_A,MC68681_COMMAND_REG_B
- */
-#define MC68681_MODE_REG_ENABLE_RX 0x01
-#define MC68681_MODE_REG_DISABLE_RX 0x02
-#define MC68681_MODE_REG_ENABLE_TX 0x04
-#define MC68681_MODE_REG_DISABLE_TX 0x08
-#define MC68681_MODE_REG_RESET_MR_PTR 0x10
-#define MC68681_MODE_REG_RESET_RX 0x20
-#define MC68681_MODE_REG_RESET_TX 0x30
-#define MC68681_MODE_REG_RESET_ERROR 0x40
-#define MC68681_MODE_REG_RESET_BREAK 0x50
-#define MC68681_MODE_REG_START_BREAK 0x60
-#define MC68681_MODE_REG_STOP_BREAK 0x70
-#define MC68681_MODE_REG_SET_RX_BRG 0x80
-#define MC68681_MODE_REG_CLEAR_RX_BRG 0x90
-#define MC68681_MODE_REG_SET_TX_BRG 0xa0
-#define MC68681_MODE_REG_CLEAR_TX_BRG 0xb0
-#define MC68681_MODE_REG_SET_STANDBY 0xc0
-#define MC68681_MODE_REG_SET_ACTIVE 0xd0
-
-/*
- * Mode Register Definitions
- *
- * MC68681_MODE_REG_1A
- * MC68681_MODE_REG_1B
- */
-#define MC68681_5BIT_CHARS 0x00
-#define MC68681_6BIT_CHARS 0x01
-#define MC68681_7BIT_CHARS 0x02
-#define MC68681_8BIT_CHARS 0x03
-
-#define MC68681_ODD_PARITY 0x00
-#define MC68681_EVEN_PARITY 0x04
-
-#define MC68681_WITH_PARITY 0x00
-#define MC68681_FORCE_PARITY 0x08
-#define MC68681_NO_PARITY 0x10
-#define MC68681_MULTI_DROP 0x18
-
-#define MC68681_ERR_MODE_CHAR 0x00
-#define MC68681_ERR_MODE_BLOCK 0x20
-
-#define MC68681_RX_INTR_RX_READY 0x00
-#define MC68681_RX_INTR_FFULL 0x40
-
-#define MC68681_NO_RX_RTS_CTL 0x00
-#define MC68681_RX_RTS_CTRL 0x80
-
-
-/*
- * Mode Register Definitions
- *
- * MC68681_MODE_REG_2A
- * MC68681_MODE_REG_2B
- */
-#define MC68681_STOP_BIT_LENGTH__563 0x00
-#define MC68681_STOP_BIT_LENGTH__625 0x01
-#define MC68681_STOP_BIT_LENGTH__688 0x02
-#define MC68681_STOP_BIT_LENGTH__75 0x03
-#define MC68681_STOP_BIT_LENGTH__813 0x04
-#define MC68681_STOP_BIT_LENGTH__875 0x05
-#define MC68681_STOP_BIT_LENGTH__938 0x06
-#define MC68681_STOP_BIT_LENGTH_1 0x07
-#define MC68681_STOP_BIT_LENGTH_1_563 0x08
-#define MC68681_STOP_BIT_LENGTH_1_625 0x09
-#define MC68681_STOP_BIT_LENGTH_1_688 0x0a
-#define MC68681_STOP_BIT_LENGTH_1_75 0x0b
-#define MC68681_STOP_BIT_LENGTH_1_813 0x0c
-#define MC68681_STOP_BIT_LENGTH_1_875 0x0d
-#define MC68681_STOP_BIT_LENGTH_1_938 0x0e
-#define MC68681_STOP_BIT_LENGTH_2 0x0f
-
-#define MC68681_CTS_ENABLE_TX 0x10
-#define MC68681_TX_RTS_CTRL 0x20
-
-#define MC68681_CHANNEL_MODE_NORMAL 0x00
-#define MC68681_CHANNEL_MODE_ECHO 0x40
-#define MC68681_CHANNEL_MODE_LOCAL_LOOP 0x80
-#define MC68681_CHANNEL_MODE_REMOTE_LOOP 0xc0
-
-/*
- * Status Register Definitions
- *
- * MC68681_STATUS_REG_A, MC68681_STATUS_REG_B
- */
-#define MC68681_RX_READY 0x01
-#define MC68681_FFULL 0x02
-#define MC68681_TX_READY 0x04
-#define MC68681_TX_EMPTY 0x08
-#define MC68681_OVERRUN_ERROR 0x10
-#define MC68681_PARITY_ERROR 0x20
-#define MC68681_FRAMING_ERROR 0x40
-#define MC68681_RECEIVED_BREAK 0x80
-
-
-/*
- * Interupt Status Register Definitions.
- *
- * MC68681_INTERRUPT_STATUS_REG
- */
-
-
-/*
- * Interupt Mask Register Definitions
- *
- * MC68681_INTERRUPT_MASK_REG
- */
-#define MC68681_IR_TX_READY_A 0x01
-#define MC68681_IR_RX_READY_A 0x02
-#define MC68681_IR_BREAK_A 0x04
-#define MC68681_IR_COUNTER_READY 0x08
-#define MC68681_IR_TX_READY_B 0x10
-#define MC68681_IR_RX_READY_B 0x20
-#define MC68681_IR_BREAK_B 0x40
-#define MC68681_IR_INPUT_PORT_CHANGE 0x80
-
-/*
- * Status Register Definitions.
- *
- * MC68681_STATUS_REG_A,MC68681_STATUS_REG_B
- */
-#define MC68681_STATUS_RXRDY 0x01
-#define MC68681_STATUS_FFULL 0x02
-#define MC68681_STATUS_TXRDY 0x04
-#define MC68681_STATUS_TXEMT 0x08
-#define MC68681_STATUS_OVERRUN_ERROR 0x10
-#define MC68681_STATUS_PARITY_ERROR 0x20
-#define MC68681_STATUS_FRAMING_ERROR 0x40
-#define MC68681_STATUS_RECEIVED_BREAK 0x80
-
-/*
- * Definitions for the Interrupt Vector Register:
- *
- * MC68681_INTERRUPT_VECTOR_REG
- */
-#define MC68681_INTERRUPT_VECTOR_INIT 0x0f
-
-/*
- * Definitions for the Auxiliary Control Register
- *
- * MC68681_AUX_CTRL_REG
- */
-#define MC68681_AUX_BRG_SET1 0x00
-#define MC68681_AUX_BRG_SET2 0x80
-
-
-/*
- * The following Baud rates assume the X1 clock pin is driven with a
- * 3.6864 MHz signal. If a different frequency is used the DUART channel
- * is running at the follwoing baud rate:
- * ((Table Baud Rate)*frequency)/3.6864 MHz
- */
-
-/*
- * Definitions for the Clock Select Register:
- *
- * MC68681_CLOCK_SELECT_REG_A,MC68681_CLOCK_SELECT_REG_A
- *
- * Note: ACR[7] is the MSB of the Auxiliary Control register
- * X is the extend bit.
- * CRA - 0x08 Set Rx BRG Select Extend Bit (X=1)
- * CRA - 0x09 Clear Rx BRG Select Extend Bit (X=0)
- * CRB - 0x0a Set Tx BRG Select Extend Bit (X=1)
- * CRB - 0x0b Clear Tx BRG Select Extend Bit (x=1)
- */
-#define MC68681_BAUD_RATE_MASK_50 0x00 /* ACR[7]=0,X=0 */
- /* ARC[7]=1,X=1 */
-#define MC68681_BAUD_RATE_MASK_75 0x00 /* ACR[7]=0,X=0 */
- /* ARC[7]=1,X=1 */
-#define MC68681_BAUD_RATE_MASK_110 0x01
-#define MC68681_BAUD_RATE_MASK_134_5 0x02
-#define MC68681_BAUD_RATE_MASK_150 0x03 /* ACR[7]=0,X=0 */
- /* ARC[7]=1,X=1 */
-#define MC68681_BAUD_RATE_MASK_200 0x03 /* ACR[7]=0,X=0 */
- /* ARC[7]=1,X=1 */
-#define MC68681_BAUD_RATE_MASK_300 0x04 /* ACR[7]=0,X=0 */
- /* ARC[7]=1,X=1 */
-#define MC68681_BAUD_RATE_MASK_600 0x05 /* ACR[7]=0,X=0 */
- /* ARC[7]=1,X=1 */
-#define MC68681_BAUD_RATE_MASK_1050 0x07 /* ACR[7]=0,X=0 */
- /* ARC[7]=1,X=1 */
-#define MC68681_BAUD_RATE_MASK_1200 0x06 /* ACR[7]=0,X=0 */
- /* ARC[7]=1,X=1 */
-#define MC68681_BAUD_RATE_MASK_1800 0x0a /* ACR[7]=0,X=0 */
- /* ARC[7]=1,X=1 */
-#define MC68681_BAUD_RATE_MASK_2400 0x08 /* ACR[7]=0,X=0 */
- /* ARC[7]=1,X=1 */
-#define MC68681_BAUD_RATE_MASK_3600 0x04 /* ACR[7]=0,X=0 */
- /* ARC[7]=1,X=1 */
-#define MC68681_BAUD_RATE_MASK_4800 0x09
-#define MC68681_BAUD_RATE_MASK_7200 0x0a /* ACR[7]=0,X=0 */
- /* ARC[7]=1,X=1 */
-#define MC68681_BAUD_RATE_MASK_9600 0xbb
-
-#define MC68681_BAUD_RATE_MASK_14_4K 0x05 /* ACR[7]=0,X=0 */
- /* ARC[7]=1,X=1 */
-#define MC68681_BAUD_RATE_MASK_19_2K 0xcc /* ACR[7]=1,X=0 */
- /* ARC[7]=0,X=1 */
-#define MC68681_BAUD_RATE_MASK_28_8K 0x06 /* ACR[7]=0,X=0 */
- /* ARC[7]=1,X=1 */
-#define MC68681_BAUD_RATE_MASK_38_4K 0xcc /* ACR[7]=0,X=0 */
- /* ARC[7]=1,X=1 */
-#define MC68681_BAUD_RATE_MASK_57_6K 0x07 /* ACR[7]=0,X=0 */
- /* ARC[7]=1,X=1 */
-#define MC68681_BAUD_RATE_MASK_115_5K 0x08
-#define MC68681_BAUD_RATE_MASK_TIMER 0xdd
-#define MC68681_BAUD_RATE_MASK_TIMER_16X 0xee
-#define MC68681_BAUD_RATE_MASK_TIMER_1X 0xff
-
-#endif
diff --git a/cpukit/libcsupport/preinstall.am b/cpukit/libcsupport/preinstall.am
index e56d946..e60879d 100644
--- a/cpukit/libcsupport/preinstall.am
+++ b/cpukit/libcsupport/preinstall.am
@@ -54,19 +54,6 @@ $(PROJECT_INCLUDE)/rtems/vmeintr.h: include/vmeintr.h $(PROJECT_INCLUDE)/rtems/$
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/rtems/vmeintr.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/rtems/vmeintr.h
-$(PROJECT_INCLUDE)/rtems/motorola/$(dirstamp):
- @$(MKDIR_P) $(PROJECT_INCLUDE)/rtems/motorola
- @: > $(PROJECT_INCLUDE)/rtems/motorola/$(dirstamp)
-PREINSTALL_DIRS += $(PROJECT_INCLUDE)/rtems/motorola/$(dirstamp)
-
-$(PROJECT_INCLUDE)/rtems/motorola/mc68230.h: include/motorola/mc68230.h $(PROJECT_INCLUDE)/rtems/motorola/$(dirstamp)
- $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/rtems/motorola/mc68230.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/rtems/motorola/mc68230.h
-
-$(PROJECT_INCLUDE)/rtems/motorola/mc68681.h: include/motorola/mc68681.h $(PROJECT_INCLUDE)/rtems/motorola/$(dirstamp)
- $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/rtems/motorola/mc68681.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/rtems/motorola/mc68681.h
-
$(PROJECT_INCLUDE)/rtems/assoc.h: include/rtems/assoc.h $(PROJECT_INCLUDE)/rtems/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/rtems/assoc.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/rtems/assoc.h
--
1.9.3
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